memory disambiguation

Article: Performance Analysis Tools: A Look at VTune
By: Michael S (already5chosen.delete@this.yahoo.com), August 15, 2006 4:54 pm
Room: Moderated Discussions
David Kanter (dkanter@realworldtech.com) on 8/14/06 wrote:
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>
>x86 cannot re-order stores. What core does that is new is that LDs can be moved around STs with unknown addresses.
>

All Intel processors starting form PPro can move loads around stores with unknown addresses. Core2 memory disambiguation should be something else.

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< Previous Post in Thread 
TopicPosted ByDate
VTune Article onlineDavid Kanter2006/08/13 10:10 PM
  1 ms ticks at 1 khz, 1 us ticks at 1 Mhzjl2006/08/13 10:32 PM
  Events - store missesMartin H. Kristiansen2006/08/14 12:29 AM
    Events - store missesDavid Kanter2006/08/14 09:30 PM
      Events - store missesMartin H. Kristiansen2006/08/15 01:03 AM
      Events - store missesanonymous2006/08/15 06:33 AM
        Events - store missesAndi Kleen2006/08/15 11:12 AM
          Events - store missesanonymous2006/08/15 06:41 PM
      memory disambiguationMichael S2006/08/15 04:54 PM
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