ISSCC Coverage Continues: Intel's Terascale chip

Article: ISSCC 2007: Intel's Teraflops Design
By: Anonymous1 (anon.delete@this.anon.anon), April 3, 2007 6:27 am
Room: Moderated Discussions
David Kanter (dkanter@realworldtech.com) on 4/3/07 wrote:
---------------------------
>I just wrapped up my first in-depth coverage of a topic for ISSCC 2007. This article
>focuses on Intel's Terascale research chip. As most folks know, it is an 80 tile
>design that implements networking on-chip and managed to achieve 1TFLOP/s performance.
>
>http://www.realworldtech.com/page.cfm?ArticleID=RWT040307000414
>
>By and large, the details that were previously emphasized were relatively unimportant.
>The most interesting details in the Terascale project are the overall architecture,
>the on-chip network routers, mesochronous interface and clock distribution.
>
>This article focuses on the technical innovations that were shown off at ISSCC.
>
>Enjoy,
>
>David

Nice article. But what am I missing here?

"The teams responsible for this project were spread across four sites at Intel: Washington, California, Oregon, Arizona and India"

;-)
< Previous Post in ThreadNext Post in Thread >
TopicPosted ByDate
ISSCC Coverage Continues: Intel's Terascale chipDavid Kanter2007/04/02 11:40 PM
  Who is right?no one2007/04/03 03:17 AM
    Who is right?David Kanter2007/04/03 09:25 AM
  ISSCC Coverage Continues: Intel's Terascale chipAnonymous12007/04/03 06:27 AM
    ISSCC Coverage Continues: Intel's Terascale chipDavid Kanter2007/04/03 09:26 AM
  ISSCC Coverage Continues: Intel's Terascale chipflamingEndian2007/04/03 11:48 AM
    ISSCC Coverage Continues: Intel's Terascale chipAnonymous12007/04/03 12:24 PM
      ISSCC Coverage Continues: Intel's Terascale chipDavid Kanter2007/04/03 12:38 PM
        ISSCC Coverage Continues: Intel's Terascale chipMarcin Niewiadomski2007/04/06 02:14 AM
          CMP Design spaceDavid Kanter2007/04/07 10:55 PM
            CMP Design spaceMarcin Niewiadomski2007/04/09 09:18 PM
              CMP Design spaceDavid Kanter2007/04/09 10:15 PM
                CMP Design spaceAnonymous12007/04/10 07:53 AM
                  Plesiosynchronous interfacesDavid Kanter2007/04/10 08:22 AM
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