ISSCC Coverage Continues: Intel's Terascale chip

Article: ISSCC 2007: Intel's Teraflops Design
By: Marcin Niewiadomski (marcin.niewiadomski.delete@this.gmail.com), April 6, 2007 2:14 am
Room: Moderated Discussions
David Kanter (dkanter@realworldtech.com) on 4/3/07 wrote:
---------------------------
>I'd interpret it as elements of this technology will be used in commercial products within 5 years or less.
>
>There's no way Intel is going to produce something based on those processing engines;
>they'd at least use something that has virtual memory, caches, TLBs, coherency,
>etc. So that means you have to rip out most of the tiles right there.
>
>They might recycle parts of the network though, or maybe just the underlying ideas.
>
>DK

I think that Intel will only reuse the ideas (or prove them wrong). As it was mentioned earlier, it is not possible to get 16 or more cores with same tricks, which work for 1-8.

In general, there are two ways - one is to have some centralized system like it is currently implemented in Cell and modern GPUs (e.g. ATI Xenos, pixel shaders in ATI R5x0 series, NVIDIA G80). Simply there is one "core" responsible for management and coordination of other cores.

The other way is to have distributed system and my guess is that Intel is investigating that area in Polaris. That's why they have a lot of very simple cores - in my opinion they are "complex enough" for studies focusing on massive multicore system architecture.
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TopicPosted ByDate
ISSCC Coverage Continues: Intel's Terascale chipDavid Kanter2007/04/02 11:40 PM
  Who is right?no one2007/04/03 03:17 AM
    Who is right?David Kanter2007/04/03 09:25 AM
  ISSCC Coverage Continues: Intel's Terascale chipAnonymous12007/04/03 06:27 AM
    ISSCC Coverage Continues: Intel's Terascale chipDavid Kanter2007/04/03 09:26 AM
  ISSCC Coverage Continues: Intel's Terascale chipflamingEndian2007/04/03 11:48 AM
    ISSCC Coverage Continues: Intel's Terascale chipAnonymous12007/04/03 12:24 PM
      ISSCC Coverage Continues: Intel's Terascale chipDavid Kanter2007/04/03 12:38 PM
        ISSCC Coverage Continues: Intel's Terascale chipMarcin Niewiadomski2007/04/06 02:14 AM
          CMP Design spaceDavid Kanter2007/04/07 10:55 PM
            CMP Design spaceMarcin Niewiadomski2007/04/09 09:18 PM
              CMP Design spaceDavid Kanter2007/04/09 10:15 PM
                CMP Design spaceAnonymous12007/04/10 07:53 AM
                  Plesiosynchronous interfacesDavid Kanter2007/04/10 08:22 AM
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