By: Paul (no.delete@this.thanks.com), May 13, 2007 2:40 pm
Room: Moderated Discussions
Linus Torvalds (torvalds@osdl.org) on 5/13/07 wrote:
---------------------------
>So no, PAE does not mean that you can use more than
>4GB of RAM. Even before PAE, the practical limit was around
>1GB, and PAE didn't move that post a fraction of an inch!
Before PAE the practical limit on physical memory was set by the cacheable size of the processor. Even some processors which theoretically had PAE36 could not cache enough memory. For example many PII era processors could only cache 512MB of RAM and PI era processors had lower limits such as 256MB dependant on external tag ram on the chipset.
Yes PAE is ugly with doubling of page table sizes, limitations on device memory needing to be below 4GB, issues with drivers and assumptions which PAE makes false and needing three rather than two level page tables but it does work to a first approximation. Also remember that you have to enable PAE to enable NoExecute bits even if you aren't using the extra address space.
Mapping physical memory into kernel memory directly leading to the 896MB/1GB physical memory limitation which you get out of adding levels of indirection to map high memory below 1GB is a design choice. There are other allbeit less efficent ways of doing it.
One sane answer is running 32 bit user space executables on a 64 bit kernel and only compiling for 64 bit when you actually need the address space This is the approach Solaris on UltraSPARC has taken for years.
However on x86 you get better performance on some code compiling for 64 bit due to the extra GP registers it introduces. Therefore what is needed is a pointer compression scheme where you can have a 64 bit executable but use 32 bit pointers such that you don't incur the memory and memory bandwith requirements of 64 bit pointers if your process doesn't need to access that much memory (and most processes don't).
Various people have proposed schemes to do pointer compression but since it would require seriously major compiler surgery to make it happen I'm not aware of any realistic implmentations.
---------------------------
>So no, PAE does not mean that you can use more than
>4GB of RAM. Even before PAE, the practical limit was around
>1GB, and PAE didn't move that post a fraction of an inch!
Before PAE the practical limit on physical memory was set by the cacheable size of the processor. Even some processors which theoretically had PAE36 could not cache enough memory. For example many PII era processors could only cache 512MB of RAM and PI era processors had lower limits such as 256MB dependant on external tag ram on the chipset.
Yes PAE is ugly with doubling of page table sizes, limitations on device memory needing to be below 4GB, issues with drivers and assumptions which PAE makes false and needing three rather than two level page tables but it does work to a first approximation. Also remember that you have to enable PAE to enable NoExecute bits even if you aren't using the extra address space.
Mapping physical memory into kernel memory directly leading to the 896MB/1GB physical memory limitation which you get out of adding levels of indirection to map high memory below 1GB is a design choice. There are other allbeit less efficent ways of doing it.
One sane answer is running 32 bit user space executables on a 64 bit kernel and only compiling for 64 bit when you actually need the address space This is the approach Solaris on UltraSPARC has taken for years.
However on x86 you get better performance on some code compiling for 64 bit due to the extra GP registers it introduces. Therefore what is needed is a pointer compression scheme where you can have a 64 bit executable but use 32 bit pointers such that you don't incur the memory and memory bandwith requirements of 64 bit pointers if your process doesn't need to access that much memory (and most processes don't).
Various people have proposed schemes to do pointer compression but since it would require seriously major compiler surgery to make it happen I'm not aware of any realistic implmentations.
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