By: anon (no.delete@this.spam.com), September 22, 2007 9:05 pm
Room: Moderated Discussions
8B/10B Latency (dwhess@banishedsouls.org) on 9/22/07 wrote:
---------------------------
>David Kanter (dkanter@realworldtech.com) on 9/22/07 wrote:
>---------------------------
>>Jigal (jigal2@gmail.com) on 9/22/07 wrote:
>>---------------------------
>>>Hi there,
>>>
>>>Being a newbie I throw myself at the mercy of the forum.
>>
>>Welcome - I think you'll find we're a pretty merciful bunch.
>
>Burn him! jk :)
>
>>>Small question - how come they didn't leverage the PCI >Express and needed a new
>>>bus (excuse me, p2p interconnect) altogether?
>>
>>PCI Express isn't coherent, it's also fairly high latency since it uses 8B/10B clock encoding.
>
>How much latency does 8B/10B encoding contribute? If I am reading this correctly,
>Lattice has a programmable logic implementation optimized for throughput with only
>2 clocks of latency on the encoder and 3 clocks on the decoder when working exclusively with serial bit streams:
>
>http://www.latticesemi.com/dynamic/view_document.cfm?document_id=5653
>
>CSI would require a factor of 60 speed up of course. I admittedly have never had
>to deal with the logic design for high speed 8B/10B. Could the shift from a PLD
>design to a full custom one yield that large a difference?
>
>I suspect there is not a good reason to use 8B/10B encoding and sacrifice 20% of
>your throughput where a clock can be made available unless
But if a clock signal were made available, then you'd be wasting 100% of the potential throughput from that particular signal link, which could have been transferring data instead.
>you want to support AC
>coupling like Hypertransport 3 where they do list lower throughput and higher latency
>as a disadvantage for this type of operation.
---------------------------
>David Kanter (dkanter@realworldtech.com) on 9/22/07 wrote:
>---------------------------
>>Jigal (jigal2@gmail.com) on 9/22/07 wrote:
>>---------------------------
>>>Hi there,
>>>
>>>Being a newbie I throw myself at the mercy of the forum.
>>
>>Welcome - I think you'll find we're a pretty merciful bunch.
>
>Burn him! jk :)
>
>>>Small question - how come they didn't leverage the PCI >Express and needed a new
>>>bus (excuse me, p2p interconnect) altogether?
>>
>>PCI Express isn't coherent, it's also fairly high latency since it uses 8B/10B clock encoding.
>
>How much latency does 8B/10B encoding contribute? If I am reading this correctly,
>Lattice has a programmable logic implementation optimized for throughput with only
>2 clocks of latency on the encoder and 3 clocks on the decoder when working exclusively with serial bit streams:
>
>http://www.latticesemi.com/dynamic/view_document.cfm?document_id=5653
>
>CSI would require a factor of 60 speed up of course. I admittedly have never had
>to deal with the logic design for high speed 8B/10B. Could the shift from a PLD
>design to a full custom one yield that large a difference?
>
>I suspect there is not a good reason to use 8B/10B encoding and sacrifice 20% of
>your throughput where a clock can be made available unless
But if a clock signal were made available, then you'd be wasting 100% of the potential throughput from that particular signal link, which could have been transferring data instead.
>you want to support AC
>coupling like Hypertransport 3 where they do list lower throughput and higher latency
>as a disadvantage for this type of operation.
