By: David W. Hess (dwhess.delete@this.banishedsouls.org), September 26, 2007 6:39 am
Room: Moderated Discussions
Jonathan Kang (johnbk@gmail.com) on 9/26/07 wrote:
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>From what I've read of the various Rambus patents that seem to relate to this (7271623
>and 7269706 are interesting in particular), it seems that they've been able to
>cut power consumption by improving upon just about every component in a transmission
>link in an iterative fashion. For instance, they've made a very sensitive receiver
>that does selective amplification based on a reference clock to cut on transmission pre-emphasis power, etc.
I browsed the patents. Isn't the later one from IBM?
High speed comparators often use this technique to prevent oscillation and/or lower power by becoming active only during the clock transition and then latching the output.
I always found it interesting to see an analog comparator perform logic operations faster then the contemporary saturated logic. I do not remember them beating ECL though.
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>From what I've read of the various Rambus patents that seem to relate to this (7271623
>and 7269706 are interesting in particular), it seems that they've been able to
>cut power consumption by improving upon just about every component in a transmission
>link in an iterative fashion. For instance, they've made a very sensitive receiver
>that does selective amplification based on a reference clock to cut on transmission pre-emphasis power, etc.
I browsed the patents. Isn't the later one from IBM?
High speed comparators often use this technique to prevent oscillation and/or lower power by becoming active only during the clock transition and then latching the output.
I always found it interesting to see an analog comparator perform logic operations faster then the contemporary saturated logic. I do not remember them beating ECL though.