By: Anonymous (A.delete@this.b.c.d.e.f), September 26, 2007 10:41 am
Room: Moderated Discussions
Michael S (already5chosen@yahoo.com) on 9/26/07 wrote:
---------------------------
>jigal (jigal2@gmail.com) on 9/25/07 wrote:
>---------------------------
>>I begin to understand the major point here, that CSI
>>is an extension of a CPU to CPU or CPU to memory bus,
>
>No, CSI is not CPU to memory bus. Never will be.
Huh? CPU-to-memory traffic most certainly will flow across CSI. In multi-socket systems, CSI plays the same role as ccHT does in current AMD Opteron systems: it's the interconnect which allows the CPU in Socket A to talk to the memory hanging off Socket B, and vice versa.
---------------------------
>jigal (jigal2@gmail.com) on 9/25/07 wrote:
>---------------------------
>>I begin to understand the major point here, that CSI
>>is an extension of a CPU to CPU or CPU to memory bus,
>
>No, CSI is not CPU to memory bus. Never will be.
Huh? CPU-to-memory traffic most certainly will flow across CSI. In multi-socket systems, CSI plays the same role as ccHT does in current AMD Opteron systems: it's the interconnect which allows the CPU in Socket A to talk to the memory hanging off Socket B, and vice versa.
