IntelUser2000 (Intel_user2000@yahoo.ca) on 12/9/07 wrote:
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>David Kanter (dkanter@realworldtech.com) on 12/5/07 wrote:
>---------------------------
>>The ISSCC advance program is now online, including lots of goodies (thanks to david wang for spotting it!):
>>
>>1. Tukwila - a 700mm2 behemoth
>>2. Silverthorne - tiny 47M transistor MPU
>>3. Rock - Scout threading, transaction memory and more
>>4. Niagara 3 - 16 cores this time around
>>
>>Read brief notes about these presentations at:
>>http://www.realworldtech.com/page.cfm?ArticleID=RWT120507050619
>>
>>Enjoy,
>>
>>David
>
>699mm2 die! That's huge.
>
>David, can you get more information on Silverthorne?? Any >architectural details??
>This seems like a completely new architecture. I thought it >would be somewhat based off Banias.

I've already written most of what is out there in that article:

A 47M transistor, 25mm2, sub-2W IA processor designed for mobile internet devices…It features a 2-issue, in-order pipeline with 32KB iL1 and 24KB dL1 caches, integer and floating point execution units, x86 front end, a 512KB L2 cache and a 533MT/s front-side bus. The design is manufactured in 9M 45nm High-k metal-gate CMOS and housed in a 441-ball µFCBGA package.

I'll get more details in the future I hope. I'll say the one thing that surprised me is that they are using the FSB for silverthorne. The FSB definitely is not the most power efficient communication mechanism out there...

DK