Article: ISSCC 2008 Cell Processor Update
By: slacker (email@example.com), February 25, 2008 2:49 am
Room: Moderated Discussions
- "The fundamental issue is that in the desire to minimize design effort and maintain the basic floorplan, the scalability of the processor as a whole is constrained by the scalability of the least-scalable basic blocks. As to be expected, the least scalable basic blocks are the I/Os: Rambus FlexIO and XDRAM Interfaces. This is due to the nature of I/O interfaces that have specific connectivity requirements, not due to anything that can be blamed on Rambus."
Were the XDR I/O cells shrunk at all? I would imagine that the I/O cells were designed by Rambus and provided to IBM as hard IP (GDS-II). If the cells weren't shrunk at all from 65nm, I'd be inclined to believe this is either because Rambus failed to shrink the circuits to operate on IBM's 45nm process, or because IBM didn't want to pay Rambus for the service.