ISSCC 2008 Cell Processor Update Online

Article: ISSCC 2008 Cell Processor Update
By: David Wang (dwang.delete@this.not.here.com), February 25, 2008 11:37 pm
Room: Moderated Discussions
slacker (s@lack.er) on 2/25/08 wrote:
---------------------------
>David Wang (dwang@not.here.com) on 2/25/08 wrote:
>---------------------------
>>>>2. Pads and bumps have to be at or near the same places because the package ballout
>>>>stayed the same (minimize system impact).
>>>
>>>I am not convinced by the argument that the package ballout would limit the scaling
>>>of the I/O cells. From your article, the C4 bumps were redistributed after power
>>>analysis, so IBM would have to develop another package, anyway.
>>
>>Yes, they had to develope a different package, but to use the same packaging technology,
>>they wanted to use the same bump pitch, so you can move the bumps around, just can't
>>move them closer together much more. Changing the aspect ratio would be somewhat limited by that constraint.
>
>While I agree that the package ballout could be a constraint to the chip
>layout in this regard, it also seems unlikely to me. Consider the levels which the signals must traverse:
>
>
    chip transistors <-> C4 <-> package bonding pads <-> package balls

>
>IBM has exactly one fixed constraint here: the positioning of the package balls.
>Everything else can be changed. The further you go down this hierarchy (to the left),
>the more freedom you have to move things around. This freedom is expanded when you
>consider the fact that the chip itself is shrinking. Consider the following layout:
>
>http://i26.tinypic.com/x4ohe0.png
>
>When you shrink the chip, you're usually given more area available for the routing.
>In the case of the 45nm Cell, this routing would be done on the package substrate
>itself. This is why it's hard for me to accept that the package ballout was a significant
>constraint to the layout of the I/O cells.
>
>>As I wrote, the basic floorplan had to remain unchanged, and changing the aspect
>>ratio of the rambus blocks would probably require quite a bit of hand place/route/adjustment,
>>and that would seem to be against the philosophy of the quick and dirty automated shrink.
>
>Originally, I didn't grasp that there was only ten work-years worth of effort put
>in to the shrink. When I consider that, all inefficiencies in layout are explained.
>I don't even know how you could shrink a chip of this magnitude with such little
>time investment. The automation required would be phenomenal.

Now you get it. :)

They could've done lots of things to get the shrink to be smaller: re-aspect, move, place, and route the basic blocks(as you pointed to above) - any thing is possible.

Practically, when you want automation and use tools for everything, then the constraints that I talked about makes more sense. i.e. if the basic block in the I/O cell had an aspect ratio of 4 x 6, they wanted to keep it at 4 x 6 and let the tools shrink it, then the bump/pad had to stay around where it was in a relative location to each other and the package balls. In theory, they could've gotten a much better compaction if they could changed the example basic block to 3 x 8, but that would've taken a lot more design man-years.

They spent quite a bit of time on designing and automating the tool flow, then fired it off. The presenter stated it quite explicitly - automation for everything, concentrate on low power, hand tune the circuits only to reduce power or DFM enhancements.

They literally did the project in 1 year with the ~10 people listed on the paper.
< Previous Post in ThreadNext Post in Thread >
TopicPosted ByDate
ISSCC 2008 Cell Processor Update OnlineDavid Kanter2008/02/25 01:08 AM
  ISSCC 2008 Cell Processor Update Onlineslacker2008/02/25 02:49 AM
    ISSCC 2008 Cell Processor Update OnlineDavid Wang2008/02/25 10:59 AM
      ISSCC 2008 Cell Processor Update Onlineslacker2008/02/25 04:14 PM
        ISSCC 2008 Cell Processor Update OnlineDavid Wang2008/02/25 04:48 PM
          ISSCC 2008 Cell Processor Update OnlineDavid Kanter2008/02/25 06:49 PM
            ISSCC 2008 Cell Processor Update OnlineDavid Wang2008/02/25 07:04 PM
              ISSCC 2008 Cell Processor Update OnlineGabriele Svelto2008/02/27 02:22 AM
          ISSCC 2008 Cell Processor Update Onlineslacker2008/02/25 08:30 PM
            ISSCC 2008 Cell Processor Update OnlineDavid Wang2008/02/25 11:37 PM
              ISSCC 2008 Cell Processor Update Onlineanonymous2008/02/29 01:00 PM
            ISSCC 2008 Cell Processor Update OnlinePeter2008/03/01 12:03 PM
        ISSCC 2008 Cell Processor Update OnlineDavid W. Hess2008/02/25 08:40 PM
          ISSCC 2008 Cell Processor Update Onlineslacker2008/02/25 09:15 PM
            ISSCC 2008 Cell Processor Update Onlineslacker2008/02/26 10:14 PM
  ISSCC 2008 Cell Processor Update OnlineDoug Siebert2008/02/25 08:41 PM
    ISSCC 2008 Cell Processor Update Onlineend user2008/02/26 11:39 AM
      ISSCC 2008 Cell Processor Update Onlineav2008/02/26 03:49 PM
        ISSCC 2008 Cell Processor Update Onlineanonymous2008/02/29 01:16 PM
          ISSCC 2008 Cell Processor Update OnlineDavid Wang2008/02/29 05:21 PM
      ISSCC 2008 Cell Processor Update OnlineGabriele Svelto2008/02/27 02:30 AM
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