CMPXCHG latency

By: Aaron Spink (aaronspink.delete@this.notearthlink.net), March 31, 2008 7:15 pm
Room: Moderated Discussions
Linus Torvalds (torvalds@linux-foundation.org) on 3/31/08 wrote:
---------------------------
>Michael S (already5chosen@yahoo.com) on 3/31/08 wrote:
>>
>>Non-contended spinlock doesn't mean the absence of cache-
>>bouncing. I'd guess that in majority of practical cases you
>>will see a combination of very low contention rate with
>>high (or, when the number of threads exceeds two, very
>>high) cache-bouncing rates.
>
>There are lots of very common cases where you have
>absolutely no cache contention or bouncing at all in
>practice.
>
>Any piece of code that is thread-safe has to have locking,
>but a lot of it is then not used with threads at all, or
>has the threads idle - waiting for some event.
>
>This includes some very basic code like core library code,
>and under many loads that code is hot and critical. Think
>about something as fundamental as just "malloc()", and
>think about the fact that the same library code is used
>for both threaded and non-threaded applications.
>
>And even for things like a kernel, and with hundreds of
>threads active, it's quite common that you have lots of
>very core data structures that might be touched by
>multiple threads, but often are not in practice.
>
>Things like locks for individual files or directories, or
>a socket. Yeah, you may have multiple threads or processes
>operating on them, but in 99% of all cases there is just a
>single thread doing it - even when there are other threads
>touching other files.
>
>Some code goes to extreme extents to avoid the locking
>costs, by turning it into a code size cost instead (ie
>using conditional code to avoid the actual lock when you
>know it's not needed). That doesn't always work (ie a lock
>may not have any dynamic contention, but it could be
>reached in theory, and has its own costs, obviously.
>

So the question becomes, if you could design your own hardware based locking interface/functionality what would it look like? CMPXCHG? Some sort of advanced multiple LL/SC/transactional memory?

aaron spink
speaking for myself inc.
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