Nehalem Architecture: Improvements Detailed

By: Mr. Camel (a.delete@this.b.c), March 17, 2008 8:50 pm
Room: Moderated Discussions
The transistor count for Dunnington is huge (1.9B). When Beckton comes out, it will be the highest transistor count Intel CPU - the first time that an x86 CPU exceeds an Itanium CPU in transistor count.

Blut Aus Nord (No@Thanks.com) on 3/17/08 wrote:
---------------------------
>Anand has a sum-up:
>
>http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=3264&p=2
>
>"Nehalem allows for 33% more micro-ops in flight compared to Penryn (128 micro-ops
>vs. 96 in Penryn), this increase was achieved by simply increasing the size of
>the re-order window and other such buffers throughout the pipeline.
>
>With more micro-ops in flight, Nehalem can extract greater instruction level parallelism
>(ILP) as well as support an increase in micro-ops thanks to each core now handling micro-ops from two threads at once.
>
>Despite the increase in ability to support more micro-ops in flight, there have
>been no significant changes to the decoder or front end of Nehalem. Nehalem is still
>fundamentally the same 4-issue design we saw introduced with the first Core 2 microprocessors.
>The next time we'll see a re-evaluation of this front end will most likely be 2
>years from now with the 32nm "tock" processor, codenamed Sandy Bridge.
>
>Nehalem also improved unaligned cache access performance. In SSE there are two
>types of instructions: one if your data is aligned to a 16-byte cache boundary,
>and one if your data is unaligned. In current Core 2 based processors, the aligned
>instructions could execute faster than the unaligned instructions. Every now and
>then a compiler would produce code that used an unaligned instruction on data that
>was aligned with a cache boundary, resulting in a performance penalty. Nehalem fixes
>this case (through some circuit tricks) where unaligned instructions running on aligned data are now fast.
>
>In many applications (e.g. video encoding) you're walking through bytes of data
>through a stream. If you happen to cross a cache line boundary (64-byte lines) and
>an instruction needs data from both sides of that boundary you encounter a latency
>penalty for the unaligned cache access. Nehalem significantly reduces this latency
>penalty, so algorithms for things like motion estimation will be sped up significantly
>(hence the improvement in video encode performance).
>
>Nehalem also introduces a second level branch predictor per core. This new branch
>predictor augments the normal one that sits in the processor pipeline and aids it
>much like a L2 cache works with a L1 cache. The second level predictor has a much
>larger set of history data it can use to predict branches, but since its branch
>history table is much larger, this predictor is much slower. The first level predictor
>works as it always has, predicting branches as best as it can, but simultaneously
>the new second level predictor will also be evaluating branches. There may be cases
>where the first level predictor makes a prediction based on the type of branch but
>doesn't really have the historical data to make a highly accurate prediction, but
>the second level predictor can. Since it (the 2nd level predictor) has a larger
>history window to predict from, it has higher accuracy and can, on the fly, help
>catch mispredicts and correct them before a significant penalty is incurred.
>
>The renamed return stack buffer is also a very important enhancement to Nehalem.
>Mispredicts in the pipeline can result in incorrect data being populated into Penryn's
>return stack (a data structure that keeps track of where in memory the CPU should
>begin executing after working on a function). A return stack with renaming support
>prevents corruption in the stack, so as long as the calls/returns are properly paired
>you'll always get the right data out of Nehalem's stack even in the event of a mispredict."
>
>More info and slides:
>
>http://www.intel.com/pressroom/archive/reference/whitepaper_Nehalem.pdf
>
>http://download.intel.com/pressroom/archive/reference/Gelsinger_briefing_0308.pdf
>>
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TopicPosted ByDate
Nehalem Architecture: Improvements Detailed Blut Aus Nord2008/03/17 02:52 PM
  Nehalem Architecture: Improvements Detailed bah2008/03/17 04:45 PM
    Nehalem Architecture: Improvements Detailed Linus Torvalds2008/03/17 06:14 PM
      Nehalem Architecture: Improvements Detailed Gabriele Svelto2008/03/18 01:11 AM
        Nehalem Architecture: Improvements Detailed Henrik S2008/03/18 04:23 AM
        Nehalem Architecture: Improvements Detailed Doug Siebert2008/03/18 09:48 PM
          Nehalem Architecture: Improvements Detailed anon2008/03/18 10:37 PM
            Nehalem Architecture: Improvements Detailed Doug Siebert2008/03/19 05:23 PM
          Nehalem Architecture: Improvements Detailed Ian Ollmann2008/03/19 08:15 AM
            SSE 4.2 Michael S2008/03/19 04:13 PM
              SSE 4.2 Ian Ollmann2008/03/20 09:56 AM
              SSE 4.2 anonymous2008/03/20 12:29 PM
                SSE 4.2 David W. Hess2008/03/21 07:24 AM
                  SSE 4.2 anonymous2008/03/22 07:27 AM
      CMPXCHG latencyDavid Kanter2008/03/28 05:59 PM
        CMPXCHG latencyanonymous coward2008/03/28 10:24 PM
          CMPXCHG latencyDavid Kanter2008/03/28 10:26 PM
            CMPXCHG latencyLinus Torvalds2008/03/29 11:43 AM
              CMPXCHG latencyDavid W. Hess2008/03/29 11:56 AM
              CMPXCHG latencyLinus Torvalds2008/03/29 02:17 PM
                CMPXCHG latencyGabriele Svelto2008/03/31 12:25 AM
                  CMPXCHG latencyMichael S2008/03/31 12:38 AM
                    CMPXCHG latencynick2008/03/31 12:52 AM
                      CMPXCHG latencyMichael S2008/03/31 01:51 AM
                        CMPXCHG latencyGabriele Svelto2008/03/31 02:08 AM
                        CMPXCHG latencynick2008/03/31 07:20 PM
                          CMPXCHG latencyMichael S2008/04/01 01:14 AM
                            CMPXCHG latencynick2008/04/01 02:34 AM
                    CMPXCHG latencyLinus Torvalds2008/03/31 10:16 AM
                      CMPXCHG latencyAaron Spink2008/03/31 07:15 PM
                        CMPXCHG latencynick2008/03/31 07:34 PM
                        CMPXCHG latencyLinus Torvalds2008/04/01 08:25 AM
                          CMPXCHG latencyZan2008/04/01 09:54 PM
                          CMPXCHG latencyZan2008/04/02 12:11 AM
                            CMPXCHG latencyLinus Torvalds2008/04/02 08:04 AM
                              CMPXCHG latencyZan2008/04/02 11:02 AM
                                CMPXCHG latencyLinus Torvalds2008/04/02 12:02 PM
                                  CMPXCHG latencyZan2008/04/02 04:15 PM
                      CMPXCHG latencyMichael S2008/04/01 01:26 AM
                        CMPXCHG latencyLinus Torvalds2008/04/01 07:08 AM
                CMPXCHG latency - Intel sourceWouter Tinus2008/04/02 12:36 PM
                  CMPXCHG latency - Intel sourceLinus Torvalds2008/04/02 02:21 PM
                    CMPXCHG latency - Intel sourceDavid Kanter2008/04/02 02:39 PM
    Nehalem Architecture: Improvements Detailed Philip Honermann2008/03/19 01:11 PM
      Nehalem Architecture: Improvements Detailed Linus Torvalds2008/03/19 01:43 PM
        CMPXCHG - all or nothingMichael S2008/03/19 03:49 PM
          multithreading - all or nothingno@thanks.com2008/03/19 05:17 PM
          CMPXCHG - all or nothingLinus Torvalds2008/03/19 05:21 PM
            CMPXCHG - all or nothingMichael S2008/03/20 06:38 AM
              CMPXCHG - all or nothingLinus Torvalds2008/03/20 08:45 AM
                CMPXCHG - all or nothingMichael S2008/03/21 07:08 AM
                  CMPXCHG - all or nothingLinus Torvalds2008/03/21 08:47 AM
            CMPXCHG - all or nothingHenrik S2008/03/20 10:09 AM
              CMPXCHG - all or nothingLinus Torvalds2008/03/20 10:53 AM
                CMPXCHG - all or nothingHenrik S2008/03/20 12:03 PM
                  CMPXCHG - all or nothingLinus Torvalds2008/03/20 01:12 PM
                    CMPXCHG - all or nothingHenrik S2008/03/21 12:13 AM
                      CMPXCHG - all or nothingGabriele Svelto2008/03/21 01:22 AM
        Nehalem Architecture: Improvements Detailed Philip Honermann2008/03/19 06:28 PM
          Nehalem Architecture: Improvements Detailed Linus Torvalds2008/03/19 07:42 PM
            Nehalem Architecture: Improvements Detailed Philip Honermann2008/03/20 06:03 PM
              Nehalem Architecture: Improvements Detailed Linus Torvalds2008/03/20 06:33 PM
                Nehalem Architecture: Improvements Detailed Philip Honermann2008/03/25 06:37 AM
                  Nehalem Architecture: Improvements Detailed Linus Torvalds2008/03/25 08:52 AM
                    What is DCAS? (NT)David Kanter2008/03/25 10:13 AM
                      Double compare-and-exchangeHenrik S2008/03/25 10:57 AM
                        Double compare-and-exchangeLinus Torvalds2008/03/25 11:38 AM
                          Double compare-and-exchangesavantu2008/03/25 01:54 PM
                            Double compare-and-exchangeLinus Torvalds2008/03/25 04:09 PM
                              Double compare-and-exchangeJamie Lucier2008/03/25 08:55 PM
                                Double compare-and-exchangesavantu2008/03/25 09:15 PM
                                  Double compare-and-exchangeHenrik S2008/03/26 08:40 AM
                                    Double compare-and-exchangeArun Ramakrishnan2008/03/27 02:07 AM
                                      Double compare-and-exchangeHenrik S2008/03/27 04:45 AM
                                  Surely GPL applies ?Richard Cownie2008/03/26 10:05 AM
                                    Surely GPL applies ?anon2008/03/26 02:58 PM
                                    Surely GPL applies ?Paul2008/03/26 05:01 PM
                                Double compare-and-exchangesomeone2008/03/25 09:18 PM
                                  Double compare-and-exchangeArun Ramakrishnan2008/03/27 02:03 AM
                                    Double compare-and-exchangesavantu2008/03/27 03:01 AM
                                      Double compare-and-exchangeArun Ramakrishnan2008/03/30 09:09 AM
                                        Double compare-and-exchangesavantu2008/03/30 09:59 AM
                                Double compare-and-exchangeLinus Torvalds2008/03/26 10:50 AM
                                  Double compare-and-exchangeanon2008/03/26 04:47 PM
                                  Double compare-and-exchangePaul2008/03/26 05:07 PM
                          Double compare-and-exchangeHoward Chu2008/03/25 05:18 PM
  Nehalem Architecture: Improvements Detailed Mr. Camel2008/03/17 08:50 PM
    Nehalem Architecture: Improvements Detailed anonymous2008/03/17 09:20 PM
  TFP will finally come :-)Paul A. Clayton2008/03/18 12:56 PM
  Nehalem Architecture: Improvements Detailed IntelUser20002008/03/27 07:46 PM
    Nehalem Architecture: Improvements Detailed David Kanter2008/03/27 10:21 PM
      Nehalem Architecture: Improvements Detailed nick2008/03/27 11:06 PM
        Nehalem Architecture: Improvements Detailed David Kanter2008/03/28 02:45 PM
          Nehalem Architecture: Improvements Detailed nick2008/03/28 07:52 PM
  L1 I-cachepuzzled2008/04/01 07:53 AM
    L1 I-cacheS. Rao2008/04/01 09:47 AM
    L1 I-cacherwessel2008/04/01 12:23 PM
    L1 I-cacheGabriele Svelto2008/04/03 12:30 AM
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