Peter (not@likely.com) on 6/22/08 wrote:
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>>I sometimes wonder if we should not experiment more with ISAs that make dependencies
>>explicit rather than parallelism. I am aware of only a single old academic project
>>named "WM - Weird Machine". It encoded instructions as dependent pairs with implicit
>>producer/consumer dataflow. You could say it generalized things like 'fused multiply
>>add', or the complex 'load effective address' instructions.

>I suspect that given the cost of wires today a wide issue >processor with lots of
>execution resource would run into timing issues if it >tried to do a lot of forwarding.

What do you think of as a 'wide' processor? If you are thinking of something like a GPU, which has >100 parallel ALUs, then I'd totally agree. If you were thinking of something more like an 8 issue CPU, I'm not sure I'd agree.

I think if you wanted to do a large MPU with like, 100 functional units, I'd organize them in a tree or fat-tree like structure. Of course, an MPU with 100 functional units would be a bit of a waste unless you just do || work.

>Also, designing a micro-architecture that relies on >forwarding operands from multiple
>execution resources to all other execution resources is >not going to particularly
>power efficient as wire power is so high.

Absolutely, this is the classic shared nothing versus shared everything argument.

Shared everything is always easier to program.
Shared nothing is always higher performance/cheaper/lower power.

CPUs fall into the former category, GPUs into the latter. However, for the right sort of workloads the disadvantages of the GPU's shared nothing architecture are mitigated.

DK