SSE5 has a great chance to succeed.

By: hobold (hobold.delete@this.informatik.uni-bremen.de), June 22, 2008 12:52 pm
Room: Moderated Discussions
Michael S (already5chosen@yahoo.com) on 6/22/08 wrote:
---------------------------
[...]
>By chance, "generic" PowerPC has no double-precision SIMD. There are PowerPC _extensions_
>that have it (BlueGene, Cell SPE) but they are not compatible with each other.
>
This is no chance. Motorola/Freescale aims their AltiVec implementations more towards DSP replacement, so single precision was really all they needed.

Apple moved on to IBM's implementation (based on Power4) which had two scalar FPUs. These had exactly the same throughput as a hypothetical AltiVec extension working on pairs of double precision numbers. On top of that, it was fully binary compatible and accelerated legacy FP codes.

The perceived double precision shortcoming of AltiVec is not nearly as severe when viewed in context of the scalar part of the corresponding processor.

We are not talking about an awkward FP register stack here ...
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  SSE5 has a great chance to succeed.mpx2008/06/22 12:25 AM
    SSE5 has a great chance to succeed.Michael S2008/06/22 01:42 AM
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      SSE5 has a great chance to succeed.hobold2008/06/22 12:52 PM
        SSE5 has a great chance to succeed.Michael S2008/06/22 01:46 PM
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            SSE5 has a great chance to succeed.anonymous2008/06/24 10:46 AM
          SSE5 has a great chance to succeed.Ian Ollmann2008/06/24 10:12 PM
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