>(And obviously things change if you have much less cache.
>The difference between 1MB and 2M is going to be quite big.
>But when everybody involved has 8M+ of cache, what matters
>most is how fast the cache is - at different levels -
>and the core itself. Not so much the platform outside the
>L3).
>
>Linus

I have to agree, the core architecture of EPIC has always been questionable.

First off, from what I've seen of the architecture, there doesn't seem to be a way to parallelize operations outside of those grouped in the 128-bit bundles. This is a serious deficiency when you compare the large IPC jumps seen with the P6 and Core2 - in the long-run, EPIC can't compete without a microarchitecture change. Sure, you can throw more cores at the problem, but more cores can only so so much for single-threaded problems.

The other problem is the use of branch predication to replace branch prediction + pipeline flush. Branch predication means you take every branch, and don't have to flush the pipeline on a bad branch. But the downside of predication is this: every branch taken means you have to load data from every single execution path, even those not taken. With no obvious pattern to the data, the cache tends to get fragmented more easily then other platforms, so it has to be huge.

I mean, you have to question this whole approach when the i7 tears a hole in the Itanium without even trying. How long is Intel's VLIW experiment going to last?