Linus Torvalds (torvalds@linux-foundation.org) on 2/5/09 wrote:
---------------------------
>someone (someone@somewhere.com) on 2/5/09 wrote:
>>
>>According to this study half of SPECint2006 programs have
>>average core working sets exceeding 16 MB and nearly 20%
>>exceed 32 MB:
>
>Oh, you need more memory than the caches have, but I really
>doubt that SpecInt has become that sensitive to the
>cache size. At some point the numbers were along the lines
>of "max 10% improvement from tripling the cache".
>
>So no, SpecInt2006 certainly won't fit in the cache,
>but with a larger cache you do capture a hell of a lot
>of it. Things have a lot of locality. From a cache size
>standpoint, the interesting part is the momentary working
>set.
>
>>The maximum cache one core/thread can use is 6 MB in C2D,
>>8 MB in i7, and 12 MB in Itanium.
>
>Actually, the number I quoted for Itanium was for the
>18MB L3 cache (does that make it 9M per core?). Why?

Half the L3 capacity is dedicated to each CPU.

>
>Because that's the highest performance result I found, due
>most likely to the 1.66GHz (rather than 1.6GHz) sku.
>
>That should already tell you something: it's not nearly
>as cache sensitive as it is frequency-sensitive. The
>smaller cache wins, just because it runs a tiny bit
>faster.

No. HP only sells the 24 MB SKU in bigger machines with
slower memory systems and/or slower FSBs.

Same compiler, 1.6 GHz:

r6600, 24 MB L3, 533 MHz FSB - 14.5 SPECint_base2006
r3600, 18 MB L3, 533 MHz FSB - 13.9 "
r2620, 18 MB L3, 400 MHz FSB - 13.4 "

33% more BW = +4%
33% more L3 = +4%
33% more BW+L3 = +8%

Changes - Mont 9xxx -> Tukwila:

smaller L3 per core (12/9 MB -> 6 MB per core)
lower memory latency (4s: 10s of ns, 16s+: 100s of ns)
higher mem BW per core (0.8-2.6 GB/s -> 8.5 GB/s)
higher CPU frequency (1.60-1.66 -> 2 GHz = 20-25%)

so

- SPECint likely won't improve too much (<10% ?) above
GHz increase (20-25%) and compiler improvements (???).

- bigger improvements in SPECfp, huge improvements in
SPEC_rate.

- bigger system = bigger relative performance boost.