ARM announces 2GHz netbook CPU

By: Michael S (already5chosen.delete@this.yahoo.com), September 20, 2009 10:42 am
Room: Moderated Discussions
Linus Torvalds (torvalds@linux-foundation.org) on 9/20/09 wrote:
---------------------------
>Michael S (already5chosen@yahoo.com) on 9/20/09 wrote:
>>
>>I don't believe anandtech measurements.
>
>You don't believe measurements?
>
>And instead you read some manufacturer whitepaper that
>doesn't even say "load-to-use latency" but instead talks
>about how many cycles it takes to access the array.
>
>So don't be silly. Array access time is just a small part
>of the cost of a L2 hit. You need to take into account the
>cost of the L1 miss first etc.
>
>And I don't know how accurate anandtech is, but I would
>trust their measured values more than your kind of "one
>part of the system is documented to be nine cycles, so it
>must all be nine cycles" logic.
>
>>Atom whitepaper says:
>
>My 'lmbench3' run says that an L2 access on a 1.6GHz atom
>takes 10.3-11.2ns. That's close enough to 18 cycles for my
>taste.
>

Seem like you quickly forgot the lesson of lmbench producing total crap on Northwood P4 L2 latency measurements.
How about running test of your own on Atom?
Or, at least, run lmbench3 on Cortex-A8 (according to my understanding, even you don't have yet Cortex-A9 based general-purpose machine).

>It also seems to have a memory parallelism of 1 (using the
>same benchmark), which makes it even sadder. So you have
>a slow L2, accessed by a in-order blocking core. The end
>result is not pretty.

If L1D is indeed blocking then I agree.
But I somehow don't believe that their benchmarks are good enough to figure it out.

>
>>For me it sounds like 10-11 cycle latency.
>
>To me it sounds like you don't actually know what you're
>talking about.
>
>I agree that an L2 hit shouldn't be as expensive as
>it is, but hey, if wishes were horses, beggars would ride.
>
>Atom really does suck aborted baby donkeys through a straw.
>I don't understand how anybody who clearly hasn't even
>bothered to play with one wastes his time trying to make
>excuses for it.
>

Well, there is something of truth is your words.
Personally, I am don't want to play with Atom. Personally, I very much prefer the situation in which Atom was never created and majority of netbooks today shipped with 45nm single-core Yonah derivate.
But when I look at Cortex-A9 I see a lot of marketing and very few microarcitecture facts. If ARM was not keeping the cards so close to the chest I'd likely react more positively.

>It works, and at 1.6GHz it's certainly going to
>outperform five- to ten-year old machines, so it's quite
>usable. But it's not "good" by any stretch of the
>imagination.
>
>It's very much a "plodding" microarchitecture, I have yet
>to find a single area where it made me go "whee, that's
>very cool".
>
>Linus
>

So, even single-precision SIMD is not inspiring?
That's the area where I expect Silvethorne to be the closest to the Dothan clck4clock and with right compiler (or more likely with right handcoded asm) even beat it sometimes. After all, they have 128-bit datapath vs 64-bit.
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