sylt (no@thanks.com) on 9/28/09 wrote:
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>Wilco (Wilco.Dijkstra@ntlworld.com) on 9/26/09 wrote:
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>>You can write the result to the register file as soon as it has been computed.
>>It's a big advantage over in-order as you don't have to have to pipeline (and forward)
>>every result to the final writeback stage. This is what you could call OoO completion.
>>If the instruction was not speculated then you could release resources used by that
>>instruction early as you know that it will complete once it starts.
>
>What happens if you get an interrupt or an exception?

You treat it like a branch mispredict and unwind state to the excepting instruction using a simple ROB or checkpoints. It doesn't have to be fast as a branch mispredict takes many cycles anyway. While the state is being restored and instructions in the exception routine are being fetched and decoded, outstanding instructions before the exception continue to finish.

To get a low interrupt latency you need the ability to cancel outstanding cachemisses. This is hard on an in-order, so high-end ARMs have special low-latency execution modes which limit the number of outstanding reads and writes (this reduces performance).

Wilco