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Semiconductor Technology Development Trends: Old Knobs are Broken, New Knobs Turned to the Maximum
At IEDM 2005, several presenters euphemistically equated process development to the act of turning knobs. The presenters also explained that various old, dependable knobs, long relied upon by semiconductor device engineers to enable transistor performance scaling, are now broken, and new knobs are being used to continued the performance scaling aspect of new process generations at the 65 nm, 45 nm and 32 nm nodes.
Traditionally, process scaling in terms of circuit size and performance had been achieved by aggressively pushing the limits of optical lithography to achieve smaller device feature sizes such as shorter gate lengths (Lgate). Shorter Lgate and thinner gate oxide (tox) were effective in increasing active transistor saturation drive currents (Idsat) in each successive process generation.
In effect, Lgate and tox were the old and reliable knobs that device engineers carefully dialed up in each process generation to increase active drive currents. However, numerous presentations given at IEDM 2005 made the point that the old reliable knobs have reached their limits of physical scaling and they cannot continue past the 65 nm node. To compensate for the loss of the old reliable knobs, device engineers have turned to new techniques equated as new knobs and are actively turning the new knobs as fast as possible to continue the historical process-performance scaling trends.
Figure 1 – Knobs to increase transistor drive current
In the technical presentation session for paper 10.1, the presenter from Intel made the point that transistor drive current is proportional to the width of the gate, the mobility of the charge carriers in the channel, inversion layer charge, and inversely proportional to the length of the gate. Figure 1 illustrates this proportional equation for Idsat and points out that since Lgate cannot be counted on to decreased much below existing values (~35 nm), Lgate can no longer be used as a reliable knob to further increase Idsat.
Figure 1 also illustrates that Idsat is proportional to the mobility of the charge carriers in the conduction channel and that stressed silicon have been deployed in the 90 nm and 65 nm process generations to dramatically increase the mobility of the charge carriers. Specifically, AMD reports that Idsat can be improved by as much as 53% in PMOS transistors and over 30% in NMOS transistors by deploying various techniques to stress the conduction channel.
Finally, Idsat is also proportional to the (transistor-on) inversion layer charge, and this charge had traditionally scaled relative to tox. However, since the limits of tox scaling have also been reached, no further improvements in Idsat can be achieved by further thinning the gate oxides. Instead, device engineers are working to integrate metal gate electrodes along with high-k gate oxides to provide better channel control. Experimental results have shown that metal gate electrodes and high-k gate oxides can significantly increase the (transistor-on) inversion layer charge, which in turn increases Idsat. In the following sections, background material and new disclosures on channel stressors and metal gate electrodes are respectively summarized.
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