IEDM 2005: Selected Coverage

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Background: Revisiting Ion versus Ioff

In our previous coverage of IEDM 2003, we briefly examined the relationship between Ion3 and Ioff (short channel leakage current) in the context of charge carrier mobility enhancements and strained silicon. Moreover, the brief examination mentioned that Intel uses two types of transistors in its process technology: a high Vt transistor with moderately high Ion and relatively low Ioff, and a low Vt transistor with Ion that is approximately 15% larger and Ioff that is an order of magnitude larger than the respective currents in the baseline high Vt transistor.

However, the previous discussions did not note the inherent relationship between Ion and Ioff. For that reason, and to provide proper context in the comparison of the different process technologies being introduced by Fujitsu, Intel, IBM, and numerous other companies, we revisit the issue of Ion and Ioff so that the performance characteristics of different process technologies and can be compared in the context of their different design goals.

Figure 2 – Transistor current definitions

Figure 2 illustrates various currents through a transistor. Currents that flow in an active-on transistor are labeled on the left in Figure 2, and currents that flow in an inactive-off transistor are labeled on the right in Figure 2. The naming convention used in Figure 2 is generic in nature, but the diagrams are specifically adopted from Intel’s presentation on its low power process [3].

Figure 3 – An abstract Ion versus Ioff distribution curve

Figure 3 illustrates an abstract Ion versus Ioff distribution curve. Figure 3 shows that the Ion versus Ioff relationship is linear for a given process technology when Ioff is plotted in logarithmic scale. Figure 3 further illustrates the basic concept that in a given process technology, multiple types of transistors can be designed to provide slightly higher Ion at the expense of exponentially larger Ioff leakage characteristics.

The use of multiple Vt transistors in a given process technology does not fundamentally alter the Ion versus Ioff characteristics of that process. However it enables VLSI design engineers to make the trade-off of higher leakage for higher drive currents in selected circuits within high performance chips, while lowering leakage in other non-critical portions. Figure 3 illustrates that to enable a fundamental change in the Ion versus Ioff characteristics, an improved process technology must shift the distribution line downward and to the right.

Figure 3 shows that an improved process technology that is able to shift the distribution curve to the right can enable device engineers to offer transistors with higher Ion at the same Ioff current, or transistors with the same Ion with substantially lower Ioff current.

Finally, in the various IEDM papers, Ion (Idsat) values are reported with DC and AC (rapid switching condition) values for IBM’s SOI processes, while Ion values are simply reported with DC values for bulk processes. The issue here is that the insulation layer in the SOI wafer also acts as thermal insulation and SOI device suffers more quickly from self-heating when the device is left in active state for long periods of time. The self-heating process then negatively impacts the (DC) Ion currents. However, in a typical circuit, transistors are seldom left in the active state for long periods of time, and the Ion current of true interest is the Ion current that exists in the time period immediately after a transistor is turned on, and before the self heating process reduces the Ion current. Consequently, the AC Ion is reported for SOI based processes along with DC Ion, and we use the AC Ion value for SOI processes in comparison to the DC Ion values reported for bulk processes.

3High output linear current (Idlin) is also needed to keep the gate capacitance low, but from a switching time perspective , and for the purposes of this article, Idsat and Ion are used interchangeably.

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