High-K Gate and Metal Gate Electrodes
Device engineers are very actively working to integrate metal gate electrodes and high-k gate oxides to further increases Idsat. Several papers were presented at IEDM 2004 and IEDM 2005 on the use of metal gate electrodes in conjunction with high-k gate dielectrics. However, these papers were exploratory in nature, and no company has yet disclosed a process with high-k gate and metal gate electrodes suitable for high volume, and (relatively) low cost manufacturing.
Previously, Intel had stated that its plan of record was to integrate high-k gate with metal gate electrodes at the 45 nm node. However, the sentiment offered by technical presenters from Intel at IEDM 2005 was that the roadmap is subject to change, and Intel may wait until the 32 nm node to integrate high-k gates with metal gate electrodes in the case that the metal technology does not mature in time. One conference attendee (who apparently did not work for Intel) was overheard to have wagered with his colleague over the issue of Intel’s use of metal gate electrodes at the 45 nm node. This conference attendee was sufficiently certain that the odds of Intel pulling in metal gates to the 45 nm node was greater than 50/50 and placed a wager accordingly. Unfortunately, Intel’s technical presenters declined to comment on that possibility.
Figure 7 – Reported improvements in Idsat from NiSi metal gate
At IEDM 2005, Intel did present a Nickel-silicide (NiSi) based metal gate technology that is a candidate for use in Intel’s next generation 45 nm process. Figure 7 shows the improvement in Idsat of an NMOS transistor with NiSi gate electrodes as reported by Intel in technical session 10.1 . In paper 10.1, Intel stated that the NiSi based gate electrodes were able to increase Idsat in both NMOS and PMOS transistors by as much as 20% at a constant Ioff. More remarkably, the increases in Idsat were achieved independent of Lgate scaling, tox scaling, or new channel stressor techniques.
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