Fujitsu Stays in the Game
At IEDM 2005, Fujitsu was the first to report details on its 45 nm process technology. In Session 10.3 at IEDM 2007, Fujitsu returned to give an update on its 45-nm process technology. Perhaps owing to the similar choices of 193nm immersion lithography, nitrided oxide gate dielectric, the now ubiquitous channel-stressors, all on bulk silicon, Fujitsu reported characteristics for its 45 nm process technology that are very similar to those reported by TSMC in Session 10.1. For example, where TSMC achieved drive currents of 1200/750 uA/um for its NFET and PFET, respectively, at 100 nA/um and 1.0V Vdd, Fujitsu reported 1220/765 uA/um for its NFET and PFET, respectively, at the same condition. Furthermore, Fujitsu also reported SRAM cell sizes of 0.255 um2, which is slightly larger than the 0.242 um2 SRAM cell size reported by TSMC, but still substantially smaller than the SRAM cell size of 0.346 um2 reported by Intel for its 45 nm process technology.