Intel’s 45nm Surprise: High-k Dielectrics and Metal Gates

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No More Free Lunch for Transistors

Up to the early part of this decade, CMOS semiconductor technology provided predictable and consistent improvements in performance. Each new generation improved transistor density by a factor of 2X, transistor speed by 37% and reduced switching power to boot. However, the consensus at IEDM 2005 was that for 65nm and beyond this was not feasible. Instead, process engineers will have to carefully make trade-offs between density, speed and power, depending on the intended application. Figure 1 below shows two transistors one in the “ON” state (at left) and one in the “OFF” state (at right).

Figure 1 – Transistor Operation and Leakage

Ideally, when a transistor is “ON”, the drive current Ion should be very high; while in the “OFF” state, no current should flow. Better values for Ion mean that transistors can run at higher frequency. Unfortunately, faster transistors are generally much leakier, which can be rather problematic. The major types of leakage are gate oxide leakage (Igate), where current tunnels through the gate oxide, sub-threshold leakage (Ioff), where charges flow from source to drain and junction leakage (Ijunction) to the body of the transistor.

Transistor performance can be improved by using a thinner gate oxide, but a thinner gate oxide means more gate leakage – precisely why fast transistors leak current. Before 130nm, leakage currents were not a huge issue. Since then, leakage has gotten so bad, that most device manufacturers have stopped thinning gate oxides down past ~1nm. For other reasons, the length of the gate, which also controls performance, is stuck at around ~35nm.

Historically, the supply voltage has decreased as process nodes have become smaller. This helps to maintain the overall reliability and active power consumption, but it forces the threshold voltage (which defines when the transistor turns “ON” or “OFF”) to be lower as well. As the threshold voltage decreases, the subthreshold leakage increases exponentially.

As a consequence of these two effects, transistor performance is no longer free. Faster transistors must either be larger, or leakier and electrical engineers must make trade-offs between these characteristics. David Wang wrote an excellent article covering many of these topics and more, which we strongly recommend. The important part about Intel’s announcement is that using high-k gate oxide materials and metal gates substantially improves performance, without any sacrifices and will allow process scaling to continue for a few generations.

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