Intel’s Merom Unveiled

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At this point in time, detailed performance numbers are difficult to find. Intel is claiming a 20% improvement for Merom over Yonah, a 40% improvement for Conroe on the desktop and an 80% improvement for Woodcrest over Paxville DP. Unfortunately, these are all relative and subject to change, as Merom is improved and tweaked over the coming months. However, the bottom line is that we expect the Merom family to provide a 20-40% performance boost over the prior generation products, and more in certain cases. At the same time, power consumption will drop dramatically for the desktop and server devices, in the range of 30-40% and possibly more. As a result, the performance/watt will improve substantially for Intel. With any luck, more solid details on performance, performance/watt and other quantitative metrics will be available in the near future.


Technically, this IDF has been one of the most rewarding in recent history. This is the first time in many years that a new x86 microarchitecture has been fully disclosed, and that is an exciting prospect regardless of the broader industry implications. Merom is an ambitious design that improves on its predecessors in nearly every way, especially the fanatical focus on power efficiency. Just as important as the technical innovations in Merom, this microarchitecture will have a profound impact on the industry. In the last two years, Intel has suffered a bit from the tail end of the infamous “Right Hand Turn”. Now that this turn is nearly complete, the MPU market will become far more competitive and hopefully, a new round of intense innovation will arise. Naturally, we will look forward to previews of Woodcrest and more details in the future.


[1] S. Sethumadhavan, et al. Scalable Hardware Memory Disambiguation for High ILP Processors. In 36th Annual International Symposium on Microarchitecture, 2003.
[2] G. Chrysos and J. Emer. Memory dependence prediction using store sets. In 25th Annual International Symposium on Computer Architecture, 1998.
[3] IA32 Intel Architecture Optimization Reference Manual.


We would like to thank several individuals for their time and energy:

  • George Alfs
  • Jack Doweck
  • Bob Valentine
  • Joel Emer
  • Ofri Wechsler
  • Anyone else who we may have forgotten or neglected to mention


Copyright 2006 David Kanter. All rights reserved. No portion of this article, in part or whole, may be reproduced, copied, transmitted, stored, downloaded, in any manner for any purpose without the express written consent from the author.

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