Cavium MIPSes Network and Security Processing

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The story behind Cavium Networks is security and intelligent networking. Cavium was founded in 2001, with the intent of initially producing security co-processors for network equipment. Cavium is another semiconductor company (along with P.A. Semi, Intel and AMD) that has flowered on the grave of the Alpha. Anil Jain and Rick Kessler, of EV6/7 fame are the VP of IC Engineering and Principal Engineer respectively. Syed Ali, President and CEO is also an industry veteran, having previously worked at Tandem (now HP’s Nonstop division), and launching the flash business unit at Samsung.

In 2001, Cavium successfully launched the NITROX line and has since expanded their reach with the NITROX II, accelerator cards and other security products. The growth of applications such as Virtual Private Networks and IPsec encryption produced a strong demand for security acceleration. By the end of 2005, the company claimed a hair under 250 design wins at around 120 different customers.

Cavium is looking to leverage and evolve their success in the security co-processing market, by using additional transistors and die space in modern processes to integrate security processors with general purpose MIPS processors. The ultimate goal is to handle all L4-7 networking functions in a single chip, thereby reducing costs and making development easier.

The OCTEON multi-core processor product line, presented at Fall Processor Forum 2004 and ISSCC 2006, is a scalable multi-core MIPS64 system on a chip with up to 16 cores clocking at up to 600MHz and is intended to consolidate several network processing roles into a single device. OCTEON devices handle packet processing, content filtering and security, and are marketed as Network Services Processors (NSP). This article will examine the OCTEON processor cores, the system acceleration features, system I/O and the performance and applications of the OCTEON family.

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