Sizing up the Super Heavyweights

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Putting It All Together

The estimated performance of dual socket Montecito, POWER5, and POWER5+ based systems are given below in Table 4. It is impossible to predict how large scale systems based on these MPUs will compare because Intel leaves system architecture choice and design trade-off decisions completely in the hands of OEMs. However if IPF OEMs continue to favor lower cost and complexity over maximum performance and scalability, then IBM will maintain a technical edge in its high end POWERx systems employing large scale multi-chip modules (MCMs) and very high signal count inter-MCM interconnect.

 

Montecito

(Legacy)

Montecito

(Full)

POWER5

POWER5+

Frequency (GHz)

2.3 TpmC

2.2 SPEC

2.1 Linpack

2.5 TpmC

2.4 SPEC

2.3 Linpack

 

2.0

 

2.7

Linpack GFLOP/s, N=1000, 4P

28

32

22

29

SPECint_base2k

2100

2400

1500

2000

SPECfp_base2k

3000

3700

2700

3500

SPECint_rate_base2k, 4P

96

115

78

104

SPECfp_rate_base2k, 4P

120

170

131

172

TPC-C (TpmC), 4P

190k

230k

203k

255k


Table 4 – Performance Estimates

Summary and Conclusion

Based on extrapolations and estimates derived from publicly available information, Montecito will leapfrog the performance of POWER5 in small and medium scale systems and be very competitive with POWER5+ based upgrades of those systems. The combination of Foxton technology and an associated demand based switching (DBS) system will likely give Montecito based systems significant thermal management advantages for small to medium scale SMP systems and clusters. POWER5 and POWER5+ hold an advantage in virtualization support, while RAS capability is pretty evenly matched. Too little is known about POWER6 at this time to make quantitative predictions with regards to Montvale, the planned 65 nm shrink of Montecito, but in this industry it is always safe to assume that the game of leapfrog will continue.


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