Tukwila Update
Since 2002, the Itanium family has been slowly evolving in fits and starts. Performance has roughly quadrupled, thanks to doubling the core count, increasing the frequency from 1GHz to 1.7GHz, adding fine-grained multithreading and ramping the bus speed up from 400MT/s to 667MT/s. The most prominent changes, multi-threading and dual core, all occured in Montecito, the first 90nm Itanium 2.
These improvements have all been rather incremental, because Intel cannot change the platform frequently. Itanium sells in relatively low quantities; presently, Itanium sales are roughly comparable to Xeon MP volumes. For Intel or an OEM to profit from investing in the Itanium platform, they must know that they will be able to ship that platform for an extended period of time. This is readily visible in the Xeon MP product roadmap; the last two chipsets (Clarksboro and Twin Castle) each had a roughly 2.5 year lifetime.
In the case of Itanium 2, the platform was slated to last for 6 years, during which Intel couldn’t move to a new bus architecture, nor could they dramatically exceed their power dissipation targets. Within those constraints, Intel has been able to keep apace of their RISC competition from Sun, but IBM’s POWER line has undergone some radical changes at both the system and microprocessor level and hence surpassed both Intel and Sun in performance. The most recently released Itanium 2, codenamed Montvale, shared 10.6GB/s of bus bandwidth between two cores and four threads. The front-side bus is used for three purposes: memory access, I/O access and inter-processor communications. The POWER6 in comparison has roughly 300GB/s of bandwidth for two cores and four threads, with 75GB/s for memory, 20GB/s for I/O and 130GB/s for inter-processor communication.
The real turning point for Itanium is Tukwila, a 65nm quad-core processor with a massively improved system architecture that replaces the aging front-side bus and increases bandwidth by well over an order of magnitude. Tukwila enables glueless 8-way multiprocessor systems with dual integrated memory controllers, on-die processor interconnects and directory based cache coherency.
Intel’s Itanium roadmap had Tukwila slated for release in the fourth quarter of 2008, with systems shipping in the first quarter of 2009. The good news is that Tukwila probably is shipping to OEMs, although not for revenue. Tukwila systems are nowhere in sight today, and have been pushed back on Intel’s official roadmaps. Tukwila systems are now scheduled to ship in mid-2009, which most likely means Q3.
This article will focus on the causes and nature of several changes made to the Tukwila platform and impact on the overall schedule. Hopefully, a later piece will detail the improvements in Tukwila, as disclosed at ISSCC, Hot Chips and other venues.