Tukwila Update

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Standards Fade, but the Memory Remains

From the beginning, one of the major focuses for Tukwila nee Tanglewood was bringing the Itanium system architecture into the modern age, just as the EV7 did with the Alpha architecture. One key element of this was CSI, the cache coherent system interconnect, which was extensively discussed in an earlier report. The second major element was a pair of on-die memory controllers. Back when the project was still on the drawing board, Intel’s memory strategy focused on rolling out Fully Buffered DIMMs (FBD) across 2-socket and larger servers.

One major advantages of FBD was to decouple the memory controller from the memory type. For those keen on their history, that would avoid disasters like the initial RDRAM-based P4 chipsets (or the cancelled Tinma). More importantly for servers, the buffers in FBD enable extremely high capacity memory systems, without sacrificing memory bandwidth.

At the time, fully buffered memory was already used in most high-end servers, such as those from IBM (for example, IBM’s X3 chipset, or the proprietary pSeries) or Intel’s MP servers, although there was no standard. So the notion of extending the benefits of fully buffered memory to mainstream servers was fairly reasonable, as it was already a long-standing practice for high-end systems. It would also benefit high-end servers by enabling them to benefit from the volume economics that power mainstream server memory. Consequently, Tukwila’s dual memory controllers were design to interface with Fully Buffered DIMMs.

Unfortunately, despite being a JEDEC standard, FBD proved to be unpopular for several reasons. First of all, the buffers increased power consumption by 3-5 watts for each DIMM in the system (since the buffers were attached to the DIMMs). Second, FBD was priced at a substantial premium to regular memory for smaller capacity DIMMs (e.g 1,2GB).

Based on the market acceptance (or lack thereof), Intel decided to abandon FBD for Nehalem-based mainstream servers, and instead focus on registered DDR3. By the time that this decision was made, Tukwila was well underway and the memory controller could not be changed.

While Intel did give up on FBD, they did not abandon fully buffered memory for high-end servers. Instead they began working on what is called ‘buffer on board’ – instead of integrating a buffer into every DIMM, the buffer will be in the motherboard or a memory riser card, and work with standard DIMMs. This will consume less power, as there will probably only be a single buffer chip for each memory channel, and cost substantially less – addressing the two shortcomings of FBD. Conveniently, ‘buffer on board’ will be compatible with existing FBD memory controllers, so that Tukwila can theoretically work with this new memory type.

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