Wolves in CISC Clothing

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Summary and Conclusion

The important features and defining characteristics of the three software based x86 compatibility systems featured in this article, DEC’s FX!32, Transmeta’s CMS, and Intel’s IA-32 EL, are summarized in Table 1. Of the three schemes examined, FX!32 and IA-32 EL are the most similar in purpose and application – to supplement a limited native 64 bit software base with 32 bit x86 applications. Although current IA-64 processors include x86 compatibility in hardware, the use of IA-32 EL is preferable as it provides much higher x86 application performance. In contrast to the supporting role that FX!32 and IA-32 EL play, CMS was expressly created for the novel purpose of competing in the market for x86 compatible MPUs with non-x86 compatible processors. Because of that starring role, many architectural features were included in the host processor to assist it. In terms of operation, CMS and IA-32 EL are the most similar – both collect profile information and perform x86 to native code translation on the fly during program execution. In contrast, FX!32 translates and optimizes x86 programs only after they are run under emulation to completion. The translation is performed in the background and provides for faster subsequent execution of the same program.

 

FX!32

CMS

IA-32 EL

Year Released

1996

2000

2003

Architecture

Interpreter/Translator

Interpreter/Translator

Two phase Translator

Translation

background, off-line

run-time, on-the-fly

run-time, on-the-fly

Host Architecture

Alpha (RISC)

Custom (VLIW)

IA-64 (EPIC/VLIW)

Relationship to OS

Above

Below

Above

OS Dependency

High

None

Minimal

Hardware assist

None

Extensive

None

FP Support

32b and 64b

32b, 64, and 80b

32b, 64b, and 80b

SIMD Support

None

MMX/SSE*/SSE2*
*Efficeon only

MMX/SSE

Execution Efficiency
(average native instructions per x86 instruction)

4.4
(after translation phase)

3.3 (est)
(VLIW structural NOPs not included)

3.8 (est)
(VLIW structural NOPs not included)

Performance Efficiency
(ratio of x86/native code performance)

~70% integer
~50% FP (PC apps)

Not Applicable
(native code not user accessible)

~65% integer
~35% FP (SPEC CPU2000)


Table 1 – Comparison of FX!32, CMS, and IA-32 EL

Through a quirk of history, and an irresistible combination of the software networking effect and semiconductor manufacturing economies of scale, the x86 instruction set architecture has come to possess the most valuable software base in history. The trail blazed by FX!32, CMS, and IA-32 EL demonstrate that it is possible to exploit the huge x86 software base without enslaving microprocessor architects to this quarter century old CISC ISA’s obsolete conventions, unnecessary inefficiencies, and burdensome irregularity. The emerging technology of software based ISA compatibility through dynamic translation allows us to envision a future where the accumulated software virtues of x86 (i.e. the great application base) live on long after its hardware sins are left behind.

References

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[2] Cole, T., “Porting Large-Scale Applications to Alpha”, DEC Professional, September 1992, pp. 44-51.

[3] Marks, M. et al, “Binary Translation”, Digital Technical Journal, Vol. 4, No. 4, Special Issue, 1992, pp. 1-24.

[4] Friedman, S., “Apple Preps Its PowerPCs”, Open Systems Today, February 7, 1994, p.1.

[5] Wilson, R., “Alpha takes on Windows”, Electronic Engineering Times, November 6, 1995.

[6] Hookway, R., and Herdeg, M., “DIGITAL FX!32: Combining Emulation and Binary Translation”, Digital Technical Journal, Vol. 9, No. 1, August 28, 1997, pp. 3-12.

[7] Chernoff, A. et al, “FX!32 A Profile-directed Binary Translator”, IEEE Micro, March/April 1998, pp. 56-64.

[8] Turley, J., “Alpha Runs x86 Code with FX!32”, Microprocessor Report, Vol. 10, No. 3, March 5, 1996, pp. 11-13.

[9] Wolfe, A., “Transmeta Roils Mobile Market with Crusoe Chips”, Electronic Engineering Times, January 24, 2000.

[10] Halfhill, R., “Transmeta Breaks x86 Low-power Barrier”, Microprocessor Report, Vol. 14, No. 2, February 2000.

[11] Klaiber, A., “The Technology Behind Crusoe Processors”, Transmeta Corporation white paper, January 2000.

[12] Krewell, K., “Transmeta Gets More Efficeon”, Microprocessor Report, Vol. 17, No. 10, October 2003.

[13] Gaudet, D., “Dense Computing with Transmeta’s Crusoe”, 3rd IEEE International Conference on Cluster Computing, October 8, 2001.

[14] Perry, M. and Ditzel, D., “Introducing the Transmeta TM8000 Microprocessor Family”, Transmeta Corporation white paper, October14, 2003.

[15] “IA-64 Application Developer’s Architecture Guide, Intel Corporation, order number 245188-001, May 1999.

[16] Baraz, L. et al, “IA-32 Execution Layer: a Two Phase Dynamic Translator Designed to Support IA-32 Applications on Itanium-based Systems”, Proceedings of the 36th International Symposium on Microarchitecture, 2003.


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