Michael S (already5chosen.delete@this.yahoo.com) on August 23, 2015 2:39 am wrote:
>
> Well, it makes sense and didn't make sense.
> That is, errata itself makes sense. Shit happens.
> But,
> I can understand why Intel can want to fuse off AVX and, may be,
> AES in the cheap parts, but why would they want to fuse off BMI?

I thought Intel used to try to make new extensions widespread enough to eventually (in 15 to 20 years) be considered baseline. For example, i386 Ubuntu ships some binaries that use SSE2 for math. (They crash on an old Athlon XP I booted up recently to see if it still worked.)

It seems like Intel isn't trying to make things baseline anymore.

From this perspective, omitting AVX from low-end models is fine, since current Atoms (Silvermont) don't support AVX. 10 years from now, software that wants to work on *any* CPU newer than 10 years old will still have to restrict AVX usage to functions selected at runtime. And probably still sprinkle VZEROUPPER at the end of every 256b AVX function that doesn't return a 256b vector.

It looks like Silvermont doesn't support BMI, either (just popcnt).

Does BMI really have enough transistors all in one spot that can literally be fused off? Or is this just a matter of the decoders being programmed to #UD instead of decoding the instructions?