By: Jeff S. (fakity.delete@this.fake.com),
Room: Moderated Discussions
Travis (travis.downs.delete@this.gmail.com) on May 21, 2018 2:52 pm wrote:
> Heikki Kultala (heikki.kultala.delete@this.tut.fi) on May 21, 2018 1:41 pm wrote:
> > If the data is not shared between multiple cores(in different CCX's), the data is coming either
> > from the caches of own CCX at full speed, or DRAM memory, never L3 of another CCX.
> Good to know. Can a given line appear in more than one CCX in a shared state,
> or do lines live exclusively in the L3 of at most one CCX (potentially leading
> to thrashing if cores on different CCXes are accessing the same line)?
Yes, Zen allows sharing between CCXs. The only oddity is that the home agents/line directories of the dies are collocated with the memory controllers, which modestly helps latency with uncached reads but has a substantial penalty on intra-CCX latencies.
> Heikki Kultala (heikki.kultala.delete@this.tut.fi) on May 21, 2018 1:41 pm wrote:
> > If the data is not shared between multiple cores(in different CCX's), the data is coming either
> > from the caches of own CCX at full speed, or DRAM memory, never L3 of another CCX.
> Good to know. Can a given line appear in more than one CCX in a shared state,
> or do lines live exclusively in the L3 of at most one CCX (potentially leading
> to thrashing if cores on different CCXes are accessing the same line)?
Yes, Zen allows sharing between CCXs. The only oddity is that the home agents/line directories of the dies are collocated with the memory controllers, which modestly helps latency with uncached reads but has a substantial penalty on intra-CCX latencies.
