By: Linus Torvalds (torvalds.delete@this.linux-foundation.org),
Room: Moderated Discussions
Brett (ggtgp.delete@this.yahoo.com) on June 4, 2019 8:59 pm wrote:
>
> Regrettably I must disagree.
You're just making shit up now.
> Alpha was designed with byte operations, but those tiny handful
> of transistors were disabled in the first shipping CPU’s.
> You need to look at why DEC made this difficult decision.
Bullshit. You have absolutely no idea what you are talking about.
Alpha was very much designed without byte instructions, and the original architecture manuals were extensively talking about what a clever design it was, and had extensive explanations about why that design was made.
It was all about simplifying the memory subsystem, and avoiding the "costly" byte lane swizzling, in order to aim for high frequency. There was also a feeling that a lot of byte-intensive code was about iterating over bytes, and that using vector operations (in regular integer registers) was the right approach to that issue anyway, and that code that was doing a lot of byte operations should fundamentally not do them in the first place.
There were also noises about how compilers could do this automatically, and how the simplified hardware not only resulted in faster hardware, but in an altogether better solution in general in the long run.
You won't find that language in the updated architecture reference manuals, of course, because it turned out to be complete bullshit (quite like your post), and the language was excised. But you can still find these things online. See for example
https://www.hpl.hp.com/hpjournal/dtj/vol4num4/vol4num4art1.pdf
and note how the lack of byte operations is very explicit, and is tied directly to how complicated it is, and how not doing them ties in directly to alpha architecture goals.
Also note how it talks about doing ECC on 4-byte entities, so there are things like that too.
So Brett, once again you show yourself to be a complete clown that just makes things up with absolutely zero actual background.
Go away.
Linus
>
> Regrettably I must disagree.
You're just making shit up now.
> Alpha was designed with byte operations, but those tiny handful
> of transistors were disabled in the first shipping CPU’s.
> You need to look at why DEC made this difficult decision.
Bullshit. You have absolutely no idea what you are talking about.
Alpha was very much designed without byte instructions, and the original architecture manuals were extensively talking about what a clever design it was, and had extensive explanations about why that design was made.
It was all about simplifying the memory subsystem, and avoiding the "costly" byte lane swizzling, in order to aim for high frequency. There was also a feeling that a lot of byte-intensive code was about iterating over bytes, and that using vector operations (in regular integer registers) was the right approach to that issue anyway, and that code that was doing a lot of byte operations should fundamentally not do them in the first place.
There were also noises about how compilers could do this automatically, and how the simplified hardware not only resulted in faster hardware, but in an altogether better solution in general in the long run.
You won't find that language in the updated architecture reference manuals, of course, because it turned out to be complete bullshit (quite like your post), and the language was excised. But you can still find these things online. See for example
https://www.hpl.hp.com/hpjournal/dtj/vol4num4/vol4num4art1.pdf
and note how the lack of byte operations is very explicit, and is tied directly to how complicated it is, and how not doing them ties in directly to alpha architecture goals.
Also note how it talks about doing ECC on 4-byte entities, so there are things like that too.
So Brett, once again you show yourself to be a complete clown that just makes things up with absolutely zero actual background.
Go away.
Linus