Apple Silicon M1 (what to expect based on the A14)

By: Andrei F (andrei.delete@this.anandtech.com),
Room: Moderated Discussions
Z (noreply.delete@this.127.0.0.1) on November 11, 2020 8:32 am wrote:
> Andrei F (andrei.delete@this.anandtech.com) on November 11, 2020 8:13 am wrote:
> > Dummond D. Slow (mental.delete@this.protozoa.us) on November 11, 2020 6:08 am wrote:
> > > Hmm unless that is supposed to mean that it does 2x the ops Intel and AMD can do. But I doubt Intel and AMD
> > > only do 2x 256bit versus Apple's 4x128. Not completely sure they only have 2x throughput but it's possible.
> > >
> >
> > That's exactly what's happening, it's 2x256 vs 4x128.
>
> Intel can do 2x512 or 3x256. AMD can do 4x256. Although not
> all execution pipes can perform every type of operations.

No, Intel can do 1x512 or 2x256 per cycle on consumer Ice Lake and Sunny Cove. The actual SIMD width of the pipelies is 2x256.

AMD did change from 2x256 to a distributed 4x256 on Zen3, yes, you're right, but it's still 2x256 for respectively ADDs/FMUL - though you can mix them now. I don't actually know what the practical limit here is as the core still only do 2x256b loads per cycle, it raises the utilisation for mixed workloads but I'm not sure on the actual throughput boost is.
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Apple Silicon M1 (what to expect based on the A14)juanrga
  Apple Silicon M1 (what to expect based on the A14)Gabriele Svelto
    Giant L1i is great for spec tooChester
    Apple Silicon M1 (what to expect based on the A14)Dummond D. Slow
      Apple Silicon M1 (what to expect based on the A14)Dummond D. Slow
        Apple Silicon M1 (what to expect based on the A14)Andrei F
          Apple Silicon M1 (what to expect based on the A14)Z
            Apple Silicon M1 (what to expect based on the A14)Andrei F
              Apple Silicon M1 (what to expect based on the A14)Z
                Apple Silicon M1 (what to expect based on the A14)Andrei F
                Apple Silicon M1 (what to expect based on the A14)Maynard Handley
              Apple Silicon M1 (what to expect based on the A14)itsmydamnation
                Apple Silicon M1 (what to expect based on the A14)Jeff S.
                  Apple Silicon M1 (what to expect based on the A14)Adrian
                Apple Silicon M1 (what to expect based on the A14)Will
                Apple Silicon M1 (what to expect based on the A14)Adrian
            Apple Silicon M1 (what to expect based on the A14)Adrian
      Apple Silicon M1 (what to expect based on the A14)Andrei F
        why cant they pipeline it?itsmydamnation
        Article correction?Chester
          Article correction?Andrei F
            Article correction?itsmydamnation
            Article correction?Chester
              Article correction?someone
                Article correction?someone
                  Article correction?Chester
            Article correction?anon2
              Article correction?Chester
                Article correction?anon2
          Article correction?Adrian
            I was wrongAdrian
          Article correction?anon
            Article correction?Chester
              Article correction?anon
      Apple Silicon M1 (what to expect based on the A14)anon
        Apple Silicon M1 (what to expect based on the A14)I_va
          Apple Silicon M1 (what to expect based on the A14)anon
            Apple Silicon M1 (what to expect based on the A14)I_va
              Apple Silicon M1 (what to expect based on the A14)anon
                Apple Silicon M1 (what to expect based on the A14)Maynard Handley
            Apple Silicon M1 (what to expect based on the A14)someone
              Apple Silicon M1 (what to expect based on the A14)Adrian
              Apple Silicon M1 (what to expect based on the A14)Veedrac
                Apple Silicon M1 (what to expect based on the A14)Jörn Engel
              Apple Silicon M1 (what to expect based on the A14)anon
                Apple Silicon M1 (what to expect based on the A14)Groo
                Apple Silicon M1 (what to expect based on the A14)Jon Masters
                  Apple Silicon M1 (what to expect based on the A14)anon
                    Apple Silicon M1 (what to expect based on the A14)Foo_
                      ABI compliance only "needed" for librariesPaul A. Clayton
                        ABI compliance only "needed" for librariesJon Masters
                          ABI compliance only "needed" for librariesJon Masters
                            Register stack/windowsPaul A. Clayton
              Apple Silicon M1 (what to expect based on the A14)rwessel
                Apple Silicon M1 (what to expect based on the A14)anonymou5
                  Apple Silicon M1 (what to expect based on the A14)NoSpammer
                    Apple Silicon M1 (what to expect based on the A14)Michael S
                    Apple Silicon M1 (what to expect based on the A14)Jan Vlietinck
                      Apple Silicon M1 (what to expect based on the A14)anonymou5
                        Apple Silicon M1 (what to expect based on the A14)rwessel
                          Apple Silicon M1 (what to expect based on the A14)Adrian
                            Apple Silicon M1 (what to expect based on the A14)rwessel
                              Apple Silicon M1 (what to expect based on the A14)anonymou5
                                Apple Silicon M1 (what to expect based on the A14)Simon Farnsworth
                                  Apple Silicon M1 (what to expect based on the A14)rwessel
                                    Apple Silicon M1 (what to expect based on the A14)Doug S
                                      Apple Silicon M1 (what to expect based on the A14)anonymou5
                                      Apple Silicon M1 (what to expect based on the A14)rwessel
                                        Apple Silicon M1 (what to expect based on the A14)anonymou5
                                          Apple Silicon M1 (what to expect based on the A14)rwessel
                  Apple Silicon M1 (what to expect based on the A14)Maynard Handley
                    Microarchitectural stack optimizationsPaul A. Clayton
                      Microarchitectural stack optimizationsMaynard Handley
                        Microarchitectural stack optimizationsPaul A. Clayton
                          Microarchitectural stack optimizationsNoSpammer
                            Microarchitectural stack optimizationswumpus
                              Microarchitectural stack optimizationsrwessel
                        Microarchitectural stack optimizationsEtienne Lorrain
                          Microarchitectural stack optimizationsrwessel
          Apple Silicon M1 (what to expect based on the A14)Wilco
          Apple Silicon M1 (what to expect based on the A14)Wilco
            Apple Silicon M1 (what to expect based on the A14)anon
              Apple Silicon M1 (what to expect based on the A14)Wilco
                Apple Silicon M1 (what to expect based on the A14)none
                  Apple Silicon M1 (what to expect based on the A14)Wilco
      Apple Silicon M1 (what to expect based on the A14)Adrian
        Apple Silicon M1 (what to expect based on the A14)Will
  Apple Silicon M1 (what to expect based on the A14)Anon
    Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeHeikki Kultala
      That's the sort of conventional thinking that got Intel in trouble...anon
        That's the sort of conventional thinking that got Intel in trouble...anonymou5
          That's the sort of conventional thinking that got Intel in trouble...anon
        That's the sort of conventional thinking that got Intel in trouble...R_Type
          That's the sort of conventional thinking that got Intel in trouble...blue
            That's the sort of conventional thinking that got Intel in trouble...Groo
          That's the sort of conventional thinking that got Intel in trouble...anon
            That's the sort of conventional thinking that got Intel in trouble...R_Type
              That's the sort of conventional thinking that got Intel in trouble...anon
              That's the sort of conventional thinking that got Intel in trouble...Doug S
      Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeAdrian
      Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeAnon
        Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeDoug S
          Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeAnon
            Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeDoug S
              Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeAnon
                Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeDoug S
                  Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodewumpus
                    Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeDoug S
                      Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeHeikki Kultala
                        Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeme
                          transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicHeikki Kultala
                            doesn't matterme
                              doesn't matteranon
                              It does matter. New chips have more cache, more high-density logic, less high-speed logicHeikki Kultala
                            transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicWilco
                              Perfect circular reasoningHeikki Kultala
                                Perfect circular reasoningWilco
                                  Perfect circular reasoning - SRAM vs logic scaling of "7nm" to "5nm"Heikki Kultala
                                Perfect circular reasoningMaynard Handley
                                  Perfect circular reasoningDoug S
                                Perfect circular reasoningAnon
                              transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicDoug S
                                transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicWilco
                                  transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicanon
                                    transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicWilco
                                      transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicMichael S
                                        transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicWilco
                                          transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicHeikki Kultala
                                        transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicMaynard Handley
                                          transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicMichael S
                                            transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicWilco
                                              transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicMichael S
                                                transisotrs/mm^2 is meaningless because cache is abotu 4x denser than logicDavid Hess
                                              Wafer size probably mattered, too ...Mark Roulo
                          Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeMichael S
                            Intel is not "3 full nodes behind": GKL/EHLAdrian
                              Atom and Arm business modelsWes Felter
                                Atom and Arm business modelsAdrian
                                  Atom and Arm business modelsJames
                                    Atom and Arm business modelsGuest2
                                      Atom and Arm business modelsJames
                                  Atom and Arm business modelsPaul
                                    Atom and Arm business modelsAdrian
                                      Atom and Arm business modelsPaul
                                      Atom and Arm business modelsBrett
                                        Atom and Arm business modelsMaynard Handley
                                          Atom and Arm business modelsgallier2
                                          Atom and Arm business modelsBrett
                                          Atom and Arm business modelsDavid Hess
                                        Atom and Arm business modelsAdrian
                                          Atom and Arm business modelsAdrian
                        Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeDoug S
            Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeMichael S
              Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeAdrian
          Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeAdrian
            Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeAdrian
            Intel is not "3 full nodes behind" in mfg tech. The real difference is much closer to ONE full nodeanon2
  Apple Silicon M1 (what to expect based on the A14)jvakon
    Apple Silicon M1 (what to expect based on the A14)Andrei F
      Apple Silicon M1 (what to expect based on the A14)jvakon
        Apple Silicon M1 (what to expect based on the A14)Maynard Handley
        Apple Silicon M1 (what to expect based on the A14)Andrei F
          Apple Silicon M1 - test Cinebench R23?Chester
            Apple Silicon M1 - test Cinebench R23?Andrei F
              Cinebench R23 maybeDummond D. Slow
                Cinebench R23 maybenone
                  Cinebench R23 maybeDoug S
                    Cinebench R23 maybenone
                      Cinebench R23 maybeDoug S
                        Cinebench R23 maybenone
                        Cinebench R23 maybeGabriele Svelto
                          Cinebench R23 maybeDavid Hess'
          Apple Silicon M1 (what to expect based on the A14)Doug S
            Apple Silicon M1 (what to expect based on the A14)anon
              Apple Silicon M1 (what to expect based on the A14)Maynard Handley
                Apple Silicon M1 (what to expect based on the A14)Chester
                  Apple Silicon M1 (what to expect based on the A14)Maynard Handley
                    Apple Silicon M1 (what to expect based on the A14)Chester
                      Apple Silicon M1 (what to expect based on the A14)Wilco
                        Apple Silicon M1 (what to expect based on the A14)Chester
                      Apple Silicon M1 (what to expect based on the A14)Doug S
                        Apple Silicon M1 (what to expect based on the A14)Chester
                          Apple Silicon M1 (what to expect based on the A14)Maynard Handley
                            Apple Silicon M1 (what to expect based on the A14)Chester
                          Apple Silicon M1 (what to expect based on the A14)Doug S
                            Possible Apple versus Intel advancements over next few yearsDummond D. Slow
                              Possible Apple versus Intel advancements over next few yearsDoug S
                                Possible Apple versus Intel advancements over next few yearsChester
                                  Possible Apple versus Intel advancements over next few yearsDavid Hess
                                Possible Apple versus Intel advancements over next few yearsDummond D. Slow
                                  Possible Apple versus Intel advancements over next few yearsDummond D. Slow
                            Apple Silicon M1 (what to expect based on the A14)Chester
                              Apple Silicon M1 (what to expect based on the A14)Doug S
                                Apple Silicon M1 (what to expect based on the A14)Chester
                                  Apple Silicon M1 (what to expect based on the A14)none
                                    Apple Silicon M1 (what to expect based on the A14)Chester
                                      Apple Silicon M1 (what to expect based on the A14)Adrian
                                      Apple Silicon M1 (what to expect based on the A14)none
                                      Apple Silicon M1 (what to expect based on the A14)Gabriele Svelto
  Apple Silicon M1 (what to expect based on the A14)Maynard Handley
    Apple Silicon M1 (what to expect based on the A14)Maynard Handley
      Apple Silicon M1 (what to expect based on the A14)Maynard Handley
        Apple Silicon M1 (what to expect based on the A14)jhodge
        Apple Silicon M1 (what to expect based on the A14)Maynard Handley
          Apple Silicon M1 (what to expect based on the A14)Maynard Handley
            Apple Silicon M1 (what to expect based on the A14)I_vs
      Apple Silicon M1 (what to expect based on the A14)Doug S
    Apple Silicon M1 vs. Tiger Lake i7-1165G7Wes Felter
      Apple Silicon M1 vs. Tiger Lake i7-1165G7 (link fixed)Wes Felter
        Apple Silicon M1 vs. Tiger Lake i7-1165G7 (link fixed)Maynard Handley
          Apple Silicon M1 vs. Tiger Lake i7-1165G7 (link fixed)Maynard Handley
            Geekbench AES testChester
              Geekbench AES testRomain Dolbeau
                Geekbench AES testAdrian
                  Geekbench AES testMichael S
          Apple Silicon MBP vs. RenoirAdrian
        Apple Silicon M1 vs. Tiger Lake i7-1165G7 (link fixed)I_vs
        Higher m1 scoreAnon
          Higher m1 scoreAnon
            Even higher m1 scoreanon
              Even higher m1 scoreanon
                Even higher m1 scoreanon
                  Even higher m1 scorenone
                    Even higher m1 scoreMichael S
                      Even higher m1 scoreThu Nguyen
                      Even higher m1 scoreAdrian
                      Even higher m1 scoreMaynard Handley
                  Even higher m1 scoreMaynard Handley
                    Even higher m1 scoreanon
                      Even higher m1 scoreMaynard Handley
                Even higher m1 scoreAdrian
                Even higher m1 scoreDoug S
    Apple Silicon M1 (what to expect based on the A14)Adrian
  A boutique 5nm piece of silicon....Alberto
    A boutique 5nm piece of silicon....I_vs
      A boutique 5nm piece of silicon....Gabriele Svelto
      A boutique 5nm piece of silicon....Adrian
        A boutique 5nm piece of silicon....I_vs
          A boutique 5nm piece of silicon....Adrian
            A boutique 5nm piece of silicon....vvid
              A boutique 5nm piece of silicon....Adrian
                A boutique 5nm piece of silicon....Maynard Handley
                  A boutique 5nm piece of silicon....Adrian
                    A boutique 5nm piece of silicon....none
                    A boutique 5nm piece of silicon....Maynard Handley
                    A boutique 5nm piece of silicon....Linus Torvalds
                      A boutique 5nm piece of silicon....Wilco
                        A boutique 5nm piece of silicon....Linus Torvalds
                          A boutique 5nm piece of silicon....Maynard Handley
                            A boutique 5nm piece of silicon....Linus Torvalds
                              A boutique 5nm piece of silicon....Maynard Handley
                                A boutique 5nm piece of silicon....Chester
                                  A boutique 5nm piece of silicon....Maynard Handley
                                    A boutique 5nm piece of silicon....Chester
                                      A boutique 5nm piece of silicon....Maynard Handley
                              A boutique 5nm piece of silicon....Jörn Engel
                                A boutique 5nm piece of silicon....Linus Torvalds
                                  A boutique 5nm piece of silicon....anon
                                  A boutique 5nm piece of silicon....Groo
                                    A boutique 5nm piece of silicon....Linus Torvalds
                                    A boutique 5nm piece of silicon....Etienne Lorrain
                                  A boutique 5nm piece of silicon....Etienne Lorrain
                              A boutique 5nm piece of silicon....Ungo
                              A boutique 5nm piece of silicon....Adrian
                              A boutique 5nm piece of silicon....Veedrac
                                A boutique 5nm piece of silicon....Maynard Handley
                                  A boutique 5nm piece of silicon....Maynard Handley
                                    A boutique 5nm piece of silicon....Dummond D. Slow
                                      A boutique 5nm piece of silicon....Doug S
                                        A boutique 5nm piece of silicon....Dummond D. Slow
                                          A boutique 5nm piece of silicon....Dummond D. Slow
                                          A boutique 5nm piece of silicon....Maynard Handley
                                            A boutique 5nm piece of silicon....Dummond D. Slow
                      A boutique 5nm piece of silicon....Doug S
                      M1 HW block for switching b/w big & small coresanon
                        M1 HW block for switching b/w big & small coresanon
                        M1 HW block for switching b/w big & small coresMaynard Handley
                          Not novel!David Kanter
                            Not novel!Maynard Handley
                      M1 might be bandwidth limited at 6-8 big coresMark Roulo
                        M1 might be bandwidth limited at 6-8 big coresAdrian
                          M1 might be bandwidth limited at 6-8 big coresMark Roulo
                          M1 might be bandwidth limited at 6-8 big coresanon
                            M1 might be bandwidth limited at 6-8 big coresJan Olšan
                      A boutique 5nm piece of silicon....I_vs
                      A boutique 5nm piece of silicon....Paul
            A boutique 5nm piece of silicon....I_vs
              A boutique 5nm piece of silicon....Adrian
                A boutique 5nm piece of silicon....I_vs
                  A boutique 5nm piece of silicon....anon
                    A boutique 5nm piece of silicon....I_vs
                      A boutique 5nm piece of silicon....anon
                        A boutique 5nm piece of silicon....I_vs
                          A boutique 5nm piece of silicon....none
                            A boutique 5nm piece of silicon....none
                          A boutique 5nm piece of silicon....anon
                            A boutique 5nm piece of silicon....I_vs
                              A boutique 5nm piece of silicon....anon
                                A boutique 5nm piece of silicon....I_vs
                                A boutique 5nm piece of silicon....Dummond D. Slow
                                  A boutique 5nm piece of silicon....anon
                      Low single core clockTemp
                A boutique 5nm piece of silicon....Adrian
                  A boutique 5nm piece of silicon....Thu Nguyen
              A boutique 5nm piece of silicon....Dummond D. Slow
    A boutique 5nm piece of silicon....juanrga
    A boutique 5nm piece of silicon....Doug S
    A boutique 5nm piece of silicon....Rayla
      A boutique 5nm piece of silicon....Guest2