Dummond D. Slow (mental.delete@this.protozoa.us) on October 1, 2024 10:08 am wrote:
> --- (---.delete@this.redheron.com) on September 30, 2024 11:04 am wrote:
> > Dummond D. Slow (mental.delete@this.protozoa.us) on September 28, 2024 10:52 am wrote:
> > > --- (---.delete@this.redheron.com) on September 28, 2024 9:35 am wrote:
> > > > Doug S (foo.delete@this.bar.bar) on September 27, 2024 12:32 pm wrote:
> > > > > --- (---.delete@this.redheron.com) on September 27, 2024 9:32 am wrote:
> > > > > > Doug S (foo.delete@this.bar.bar) on September 26, 2024 11:19 pm wrote:
> > > > > > > --- (---.delete@this.redheron.com) on September 26, 2024 8:47 pm wrote:
> > > > > > > > I don't buy this. Compare eg TSMC. They have much more of a "forward-looking" relationship with their
> > > > > > > > customers, but they aren't leaking ridiculous claims about what they will be doing 4 years from now.
> > > > > > > > Obviously I don't know the details of how they communicate, but it's sufficiently technical and couched
> > > > > > > > in uncertainty, not marketing-level grand pronouncements, that this is not a problem.
> > > > > > >
> > > > > > >
> > > > > > > TSMC has roadmaps several years out.
> > > > > > >
> > > > > > >
> > > > > > >
> > > > > > > OK 2 1/2 years out instead of 4 in the case of this roadmap
> > > > > > > which was released this spring, but they've talked
> > > > > > > even further out than that about A14 which will follow A16, mentioning its development is "well underway"
> > > > > > > in their 2023 annual report. So they're making claims about what they'll be doing 4-5 years out.
> > > > > > >
> > > > > > > So how's that different from Intel, unless you think TSMC's claims aren't
> > > > > > > "ridiculous" which you apparently believe Intel's claims to be.
> > > > > >
> > > > > > Doug, you're not stupid. Why pretend to be?
> > > > > > What are TSMC saying in that graph? That they will have new nodes every year, with such and such a name.
> > > > > > That is ALL! And that is not important info. It's like Apple saying they will have an A19 chip next year.
> > > > > > It's content-free -- which means TSMC can bob and weave around it as circumstances require. A16 will
> > > > > > be whatever it will be -- it will be a name to attach to whatever TSMC has ready after N2.
> > > > > >
> > > > > > The problem is *detailed* roadmaps, which then force the company
> > > > > > to "adhere" to those roadmaps even when that makes no sense.
> > > > > > If Intel wants to release a list of code names for the next ten years, whatever. The problem is they do
> > > > > > a lot more than that. In particular, and relevant to the starting point of this thread, they also release
> > > > > > lists of SoCs, and how the SoCs and CPU code names are tied together. And even that, apparently trivial,
> > > > > > set of two lists is enough to get them into the mess they are now in with regards to naming... Now, based
> > > > > > on the lists, they are forced to give a single name to two distinct CPU designs -- or vice versa.
> > > > >
> > > > >
> > > > > It isn't shown on what I posted, but TSMC also releases information about the power, performance and
> > > > > density of those future nodes. A16 is promised to be 15-20% more power efficient or 8-10% faster (you
> > > > > don't get both at the same time) and 7-10% denser than N2P. N2P in turn will be 30-40% more power efficient
> > > > > or 15-20% faster and 15% denser than N3E, which is TSMC's current node used for Apple's A18.
> > > > >
> > > > > TSMC is pretty explicit and specific about their promises, and they've also talked at
> > > > > length about the new technologies that will be employed in these nodes like nanosheets
> > > > > and backside power delivery network to make stated percentage improvements possible.
> > > > >
> > > > > So again, how is that different than Intel's roadmapping?
> > > >
> > > > TSMC gives pretty much
> > > > - the bare minimum they have to
> > > > - once they are sure that it will work
> > > > - and as soon as they realize they made a mistake they resteer (eg BSPD was initially suggested
> > > > for N2 but as soon as they realized that might not be feasible, it was moved to A16)
> > > >
> > > > You seem to think this is some sort of legal debate and I'm here to "prove" a point. That's
> > > > not what's going on. Like all human behaviors, there's a continuum, with Apple on end, TSMC
> > > > close to that end, nVidia close to Apple, and Intel (and Samsung) on the other end.
> > > >
> > > > If you want to argue that self-destructive behavior is good because other people sometimes
> > > > do the same thing, well, that seems to be the way most Americans think these days. That
> > > > doesn't change the fact that it's a stupid (and yes, self-destructive) attitude.
> > > > I'm not Intel's therapist - I point out the behavior and I move on. If Intel and its legion
> > > > of fans never want to learn until it's too little too late, that's their issue not mine.
> > >
> > > Are you totally sure this isn't just having a knee-jerk reaction to anything Intel ever happens to do?
> >
> > I'm mostly sure...
> >
> > Intel did some things correctly with Lunar Lake.
> > The interesting thing about LL is that
> > - it's been received very well by reviewers and "normal" people
> > - so much it represents what I have been saying they should do for years AND
> > - the changes are absolutely hated by the Intel fan base...
> > (Examples include removing SMT, prioritizing IPC over GHz, two core classes, and on-package DRAM.
> > Marketing should stress that the E cores are about throughput, not pretend that they are about the
> > lowest possible power. LL isn't going to go into phones, and its E-cores are not going to go into
> > watches, so it's *OK* that Intel designed the E-core they did -- but they come across as fools when
> > marketing pretends a different set of priorities from what engineering [correctly] chose.)
> >
> > Did they do everything right? Of course not: Why is AMX not
> > going to be part of their desktop track? And I *suspect*
> > (perhaps this will be clear in a decade) that Apple's choice
> > to make throughput computing (ie Apple AMX/SME)
> > a cluster resource rather than a core resource (ie AVX512)
> > is a better PPA balance for almost all use cases.
> > But if they fix those foolish decisions (quite probably driven by exactly the issues I keep raising, namely
> > design-by-marketing and design-by-preannouncement) I'll acknowledge that the issue has been fixed.
> >
> > Does Apple do everything perfectly? Again of course not.
> > I think Apple did essentially the correct thing to ship
> > AMX as they did, and then transition to SME once they
> > and ARM had figured out some sort of mutually acceptable commonality. But shipping the M4 with an SSVE that
> > claims to be present but is so non-performant seems a strange move and not one I'm going to defend.
> > I'm still unclear as to what their plan is for SVE, but I've come to accept that I simply don't know
> > enough to have an opinion. To someone who simply wants to use the ISA, of course it looks fine - a
> > few warts, but good enough, and an improvement on NEON for various purposes. BUT is getting the good
> > stuff (mainly predication and related matters) worth the massive extra cost, especially if you stick
> > to 128b vectors? People who seem to know what they're talking about, like Eric Quinnell at Tesla,
> > seem to think not [in terms of problems with having to implement the ISA -- not nearly as bad as the
> > RISC-V equivalent, but still not great]. Maybe cluster SME/SSVE (one that runs at SME speeds, not
> > the horrible version on M4) and on-core NEON is the optimal design point, given that you can't veer
> > off TOO far from standard ARM? Then fix this mess with an ARMv9 ISA in a decade or so?
> >
> >
> > If you want to look at knee-jerk reactions, look at the vitriol against LL from
> > WITHIN the Intel community, starting with the SMT thread on RWT right now...
> > God knows what this will look like if they ever actually ship x86S!
>
> I think you are still mostly reading your ideas into it rather than looking at the
> facts. Considering everybody that defends the usefulness of SMT in this or that scenario
> or product to be vitriolic hater of this particular processor, exactly why?

The real world consists of tradeoffs. I don't know how to respond to someone who insists that they can have everything: both the elements of LL that are making it actually popular AND a reversal of the decisions that Intel engineers say were essential to getting to that point...

So pick your interpretation.
If you want to rename, what I am calling "vitriol", "childish refusal to accept reality" I won't stop you.