Sizing up the Super Heavyweights

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Tale of the Tape – Sizing up the Contestants

The primary characteristics and features of the legacy and full capability Montecito device are summarized and compared with those of the POWER5 and future POWER5+ in Table 1. Data not directly or indirectly know from public disclosure are my own estimates and are indicated as such with “est”.

 

Montecito (Legacy)

Montecito (Full)

POWER5

POWER5+

Process

90nm bulk, 7LM

90nm bulk, 7LM

130nm SOI, 8LM

90nm SOI, 10LM

Die size (mm2)

~580 est

~580 est

389

~230 est

Transistors

1720m

1720m

276m

~300m est

Chip Multiprocessing

2 way

2 way

2 way

2 way

Multithreading

2-way CMT

2-way CMT

2-way SMT

2-way SMT

L1 cache (per CPU)

16 KB I

16 KB D

16 KB I

16 KB D

64 KB I

32 KB D

64 KB I

32 KB D

L2 cache

2 x 1.0 MB I

2 x 256 KB D

2 x 1.0 MB I

2 x 256 KB D

1.92 MB

2.25 MB est

L3 cache

2 x 12 MB

2 x 12 MB

external

external

Signal I/O

296

~600

2313

2313

Packaging

PAC611

?

DCM, MCM

DCM, MCM

Max Frequency (GHz)

2.0  – 2.3 est

SW dependent

2.0  – 2.5 est

SW dependent

2.0 est

2.7 est

TDP (W)

100

120 est

200 est

170 est

Max Memory Bandwidth

6.4 GB/s

21.3 GB/s

~16 GB/s

~20 GB/s est

Table 3 – Device Characteristics

The thermal design power of the Montecito has been stated as 100W. It is likely that the full capability version will push closer to the long established 130W IPF family power envelope because of higher I/O bandwidth and associated higher instruction throughput. The maximum clock frequency of Montecito is difficult to specify because it is a moving target. Intel’s “Foxton” dynamic power management system automatically adjusts processor clock rate and supply voltage as a function of the “activity factor” of the application being executed to keep the device running near its target power consumption limit. If an activity factor of 1.0 represents the maximum device power that can be extracted for any arbitrary code sequence (i.e. a power virus) then the maximum power of any real application (typically Linpack) is around 0.8, SPECfp2k is about 0.7, SPECint2k about 0.65, and TpmC about 0.6 [7]. Because Foxton adjusts both processor supply voltage, as well as frequency, Montecito only needs to run Linpack at about 10% lower clock rate than TpmC to keep power constant (i.e. near but not over the programmed TDP limit). Although Intel has disclosed Montecito operating frequency only as over 2 GHz performance data in [8] suggests the highest speed grade (“top bin”) Montecito is expected to run Linpack at 2.5 GHz within a future model of the HP rx2600.

POWER5 is currently shipping at a maximum of 1.9 GHz although it is likely 2.0 GHz or even slightly faster speed grades may be released over its life time. The maximum power estimate of 200W for POWER5 is based on reports of POWER4+ power consumption and system level comparison of the 4U dual socket P5-570 system with the 4U dual socket HP rx2600. Although the POWER5 incorporates an active power monitoring and management system [9], it is much less sophisticated than Foxton and closer in nature to the thermal protection/throttling scheme Intel has long used in its desktop PC processors. The POWER5+ estimated maximum clock rate of 2.7GHz is based on public statements from IBM concerning process speed scaling at 90nm and beyond, as well as current and expected progress in ramping PPC970FX clock speed beyond that of the PPC970.


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